Tag Archives: Xilinx

App note: QuickBoot method for FPGA design remote update

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A QuickBoot method for FPGA design remote update application note (PDF!) from Xilinx: This application note presents detailed descriptions of the QuickBoot method that are important for evaluating the QuickBoot solution and debugging implementation problems. Demonstration implementations of the QuickBoot method … Read more

App note: Isolation design flow for Xilinx 7 series FPGAs or Zynq-7000 AP SoCs (ISE Tools)

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Xilinx application note, Isolation design flow for Xilinx 7 series FPGAs or Zynq-7000 AP SoCs (ISE Tools) (PDF!) This application note is written for FPGA designers wishing to implement security or safety critical designs, that is, information assurance (single chip cryptography), avionics, … Read more

App note – Power distribution system (PDS) design: Using bypass/decoupling capacitors

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An app note (PDF!) from Xilinx on power distribution system (PDS) design using bypass/decoupling capacitors: This application note specifies how to build power distribution systems for Virtex™ devices. It also covers the basic principles of power distribution systems and bypass or … Read more

App note: FPGA configuration from SPI Flash memory using a Microprocessor

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From Xilinx application note on FPGA configuration method: This application note describes a simple and efficient FPGA configuration method that utilizes a microprocessor to configure an FPGA device from a Serial Peripheral Interface (SPI) flash memory. This method reduces hardware components, … Read more

App note: AXI Chip2Chip reference design for real-time video

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AXI Chip2Chip reference design for real-time video application (PDF!) from Xilinx: The LogiCORE™ IP AXI Chip2Chip is a soft Xilinx core that provides bridging between Advanced eXtensible Interface (AXI) systems for multi-device System-On-Chip solutions. This application note provides a setup demonstrating real-time … Read more

App note: Using a microprocessor to configure Xilinx FPGAs via slave serial or selectMAP mode

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Great app note from Xilinx on configuring their FPGA through slave serial and parallel selectMAP mode This application note describes a technique for configuring an FPGA from an embedded processor. Three common components are required: an embedded microprocessor, some non-volatile … Read more

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