Xilinx has an online searchable database of information on programming their CPLD devices. It includes a number of cool tips and code samples for implementing bidirectional signals, clock dividers, global nets as well as information on CPLD attributes, the schematic … Read more
Today we made the 3D model of the XC95144XL CPLD breakout board. The board has 39 of the CPLD pins broken out to a “Blade” style configuration, while the remaining pins are broken out to two dual-row headers featured on … Read more
Kiran wrote a short tutorial on how to program the Xilinx CoolRunner II CPLD development board with a computer running Windows 7. The board features an onboard USB programmer but the drivers for it are not supported by Windows 7. … Read more
Xilinx has released Issue 78 of Xcell Journal, their free online publication for embedded system and programmable logic developers. Each issue of Xcell has articles targeted at developers from every skill level, from beginner to expert. You can check out … Read more
Xilinx has announced the availability of Version 13.4 of their ISE Design Suite. This download includes the free Webpack version of the ISE and is available for Windows and Linux. This release introduces their new MicroBlaze Micro Controller System (MCS), … Read more
Seeed has a cheap JTAG programmer/debugger for both major FPGA/CPLD brands. It emulates both the Xilinx Platform USB Cable and Altera USB blaster JTAG programmers with a flip of a switch. As a Xilinx Platform USB Cable it is supported … Read more
Arhi tipped us to this starter kit for CoolRunner-II CPLDs: I can highly recommend CoolRunner-II CPLD Starter Kit. I have this small board for a while and it’s more then you need to learn to use cpld’s and it’s fairly … Read more
Jason decided to make breakout boards for the XC95144XL CPLD. A voltage regulator along with bypass capacitors are placed on-board. He provided a oscillator, connected to a global clock pin as well. The board is built with a single row … Read more
Here is some basic information about special CPLD pin functions you might need when getting started with Xilinx or any other CPLD: Global Clock (GCK) pins Many high-speed digital logic designs need a clock signal that reaches all components simultaneously. … Read more
Xilinx has announced the availability of Version 13.3 of their ISE Design Suite. This download includes the free Webpack version of the ISE and is available for Windows and Linux. This is the software package used to develop for our … Read more
Openschemes has a tutorial describing their project for bit bang JTAG programming of Xilinx CPLDs using their homebrew SVF player. They describe: Today’s lesson consists of the development of a bit-banged JTAG SVF player in order to program a device … Read more
Big Mess o’ Wires compared Xilinx and Altera’s FPGA tools: I used to believe that Altera’s FPGA tools were much more hobbyist-friendly than the comparable Xilinx tools, and I frequently bashed the Xilinx tools whenever the topic came up. But … Read more
Drone writes: XESS recently released their 92 page “FPGAs!? Now What?” book which is supposed to be a tutorial for the XuLA, but is really an informative read in-general; especially for someone getting started with Xilinx parts. You can download … Read more
Researchers in Germany have released two papers detailing how security of the bitstream on Xilinx FPGAs can be compromised. The first paper (11 pages) discusses power analysis attacks and extracting keys from Virtex-II devices. The second (3 pages) describes an … Read more
MP3 download Plunify is an online compiler for Altera and Xilinx CPLDs/FPGAs. The developers’ goal is to build an interface to instant license and computer resources for large FPGA projects. Download the MP3 to hear more about their start-up and … Read more
Xilinx has announced the availability of their ISE Design Suite 13.2. While most of the improvements appear geared toward the 7 Series FPGA families, if you’re in need of the Xilinx software or just want to upgrade you’ll find downloads … Read more
If you’re using one of our CPLD Development Boards you need to have a file in XSVF format to download to the board using the Bus Pirate loaded with the BPXSVFPLAYER firmware. We’ve posted a method to convert SVF files … Read more
bearmos tipped us to a Free Xilinx FPGA seminar. These seminars often feel like a time-share sales pitch, but if you can stand it, or you’re a starving student, there’s usually lots of free hardware and food. We always take … Read more
The website 64HDD has plenty of information about mods and upgrades for Commodore C64 enthusiasts. They have an article explaining their exploration of using CPLDs in C64 hardware mods. Their first CPLD project, explained in the article, explores the build … Read more
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