updates

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Bus Pirate: firmware v5.3

July 16, 2010 in Bus Pirate, firmware by Ian | 2 comments

Bus Pirate firmware v5.3 is ready for download. This is a recommended update with bug fixes, enhanced features, and major code cleanup. The documentation wiki has been updated with the new commands and macros.

  • Reviewed and updated terminal text
  • SPI sniffer update (reduced minimum CS delay from 50us to 120ns)
  • Removed sniff while CS high option from SPI sniffer (for now)
  • I2C sniffer update (increased max speed from ~70kHz to >100kHz)
  • Corrected LSB/MSB menu quirks
  • Added least significant bit configuration to all modes
  • Added |X command to convert byte X bitorder
  • Code cleanup: removed allowLSB and allowPULLUP variables
  • Fixed wrong CS terminal text in raw3wire mode

Read about the firmware update process for the ds30 Loader GUI (Windows/Linux) and pirate-loader console app (Windows/Linux/Mac). This firmware requires the v4+ bootloader, be sure you upgrade to the v4 bootloader first if you still have bootloader v2.

Get a Bus Pirate for $30, including worldwide shipping at Seeed Studio. Adafruit also has the Bus Pirate and probe cables in stock and ready to ship.

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Bus Pirate v4, IR Toy updates

July 9, 2010 in Bus Pirate, Development, Infrared toy by Ian | No comments

There is an update of the USB IR Toy and a new Bus Pirate v4 in the forum. Your comments and suggestions are needed to make these the best designs yet.

These projects won’t be manufactured until the fall at the earliest, and probably won’t be available until next year. This preview release is part of our pledge to move new projects to the forum earlier in the development process.

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Logic Sniffer FPGA bitstream/ROM update

May 20, 2010 in logic analyzer by Ian | 4 comments

This is an old version, see the latest version on the documentation wiki.

The Logic Sniffer stores the FPGA (IC3) bitstream in a flash ROM chip (IC2). The PIC microcontroller (IC1) can update the bitstream from a computer using the multi-platform pump-loader application. This feature lets us release FPGA design updates with new features and bug fixes that can be loaded over the USB connection.

To enter ROM update mode, press the reset button while holding the update button. The ACT LED lights when the board is in ROM update mode. The PIC will also automatically enter ROM update mode if the FPGA doesn’t load correctly after a few seconds because of an error or blank ROM chip.

Update instructions follow the break. You can order the OLS at Seeed Studio for $45, including worldwide shipping. Don’t forget that Seeed now has probe cables for $6 each. Read the rest of this entry »

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USB Infrared Toy in stock

May 4, 2010 in Infrared toy by Ian | No comments

The USB Infrared Toy is back in stock for $20, including worldwide shipping. Orders should ship immediately.

The Bus Pirate is on back order, but v3b should be tested and shipping soon.

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Open Logic Sniffer assembled, in testing

April 10, 2010 in logic analyzer, preorder by Ian | 3 comments

Openbench Logic Sniffer is an open source logic analyzer. It’s designed to support the SUMP logic analyzer software at the lowest possible cost. This project is a collaboration between the Gadget Factory and Dangerous Prototypes.

The Open Logic Sniffer returned from the factory. It will be programmed and tested soon. Seeed makes the rather ambitious estimate that they’ll ship by Monday, we think sometime next week is a really safe bet. You can read more about the production process here.

You can reserve an Open Logic Sniffer for $45, including worldwide shipping.

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Open Logic Sniffer preorder update

March 27, 2010 in logic analyzer, preorder by Ian | 7 comments

This is the manufacturing prototype of the Open Logic Sniffer logic analyzer. Parts are all in-house at Seeed Studio. Procurement is usually the most hazardous and delay-fraught phase of a preorder.

Assembly, which will begin by Monday, is usually pretty quick. After assembly, the boards will be inspected, programmed, tested, and shipped to preorder participants. Read more about the process in the preorder overview and FAQ.

You can reserve an Open Logic Sniffer for $45, including worldwide shipping.

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SUMP PUMP testing

January 30, 2010 in logic analyzer by Ian | No comments

We’ve been working on an open source logic analyzer prototype with Jack Gassett of the Gadget Factory. The project is currently known by the code name ‘SUMP-PUMP’, but you can help suggest a name. The design incorporates elements of the Butterfly platform, which is available now at the Gadget Factory.

Jack finished a bunch of tests on the first SUMP PUMP build, check out the pictures and screen shots.

We’ve got the PIC firmware working, but there’s still an issue with the bootloader. You can follow our progress and make suggestions in the forum.

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Bus Pirate feature requests?

December 30, 2009 in Bus Pirate, firmware by Ian | 5 comments

Firmware version 3.3 for the Bus Pirate will be released in a few weeks. Are there any bug fixes or features you’d like to see in the next firmware release?

We’ve made these updates since the last release:

  • Self-test now checks for voltage regulator over range, as well as under.
  • UART macro 3: transparent bridge with RTS/CTS hardware flow control signals.

Image of the fantastic laser etched case by Ril3y.

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PCBs sent this week

December 24, 2009 in News by Ian | 1 comment

We sent a bunch of PCBs to Seeed Studio’s Fusion service this week. The open source logic analyzer prototype was the most anticipated board, you can get the final hardware for free if you suggest the name.

The final design candidates for the PIC high voltage programming adapter went to the board house too. Looking at the circuit board, can you tell why we chose an MC34063A boost regulator instead of the microcontroller driven switched-mode power supply in our earlier tests?

More PCB preview goodness below.

Read the rest of this entry »

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Bounty on Bus Pirate high-priority features

November 4, 2009 in Bus Pirate by Ian | No comments

man2

Here’s a list of high-priority Bus Pirate features based on your feedback. We’re putting a bounty on these items to encourage new developers to get involved. The developer of each feature can have their choice of a Bus Pirate probe cable kit or our next monthly project.

  1. JTAG programming with OpenOCD. It should be possible to adapt an existing parallel port or FTDI232 JTAG wiggler, preferably OpenOCD, to flip bits in a byte and send it to the bitbang binary mode. We could also develop a separate binary JTAG library if requested.
  2. UART baud rate detect. A new macro for the UART library that detects baud rate using something like this.
  3. Binary mode access to the I2C sniffer for better speed. This should incorporate a simple escape sequence for control characters like start, stop, ACK, and NACK. Solution submitted, that was fast!
  4. Stepper motor driver and servo driver. The stepper motor driver will be easy, and we have a driver board in development. The servo driver will be harder simple because we don’t have any servos to test. Not sure where to put these, perhaps in an ‘extras’ library.

Read the rest of this entry »

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Bus Pirate firmware v2.3

October 8, 2009 in Bus Pirate by Ian | 17 comments

bpf23

Bus Pirate firmware v2.3 is available for download. This version fixes a major bug with the speed settings in all modes, but especially in the UART library.

There’s also two new binary IO modes for controlling the Bus Pirate from a PC, which should allow a number of complicated programmer functions that couldn’t fit in the firmware. The first new mode is a raw bitbang IO mode, similar to the bitbang mode of an FTDI232 chip. The second mode is a raw SPI mode written for high-speed communications with AVRDude.

Read the rest of this entry »

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Bus Pirate: v3 update

August 5, 2009 in BP v3, Bus Pirate, Development by Ian | No comments

bpv3-final

***We’ll start a preorder ($30 assembled, shipped worldwide) if there are a few firm commitments, sign up for notification in the forum.***

This rendering shows the nearly-complete Bus Pirate v3 PCB. Our initial preview of the new hardware generated some really good comments.

  • We decided to swap the PGC and PGD pins of the ICSP header as suggested by numerous readers. The pins will now align with a PICKIT2 programmer.
  • The power traces and vias have been expanded to handle the maximum possible loads.
  • SSOP PIC, eliminated a few parts, centered USB jack, rotated CD4066 IC to accommodate a shrouded or right angle pin header.
  • The PGC/PGD swap means this hardware will require a new bootloader and firmware. For this reason we’re going to increment the hardware to v3 instead of v2.5.
  • Added power-on self-test to firmware for hardware v3. Future hardware will probably require a jumper between PGD and ground for normal operation.
  • We decided against mounting holes. We couldn’t locate a standard separation for the hole pattern, so the holes would only fit one specific case.
  • Removed alternate resistor placement pads from bottom of PCB. Back LEDs now use the same resistors as the front side LEDs.

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