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	<title>Dangerous Prototypes &#187; bitbang</title>
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		<title>Bus Pirate: Binary I2C mode</title>
		<link>http://dangerousprototypes.com/2009/10/14/bus-pirate-binary-i2c-mode/</link>
		<comments>http://dangerousprototypes.com/2009/10/14/bus-pirate-binary-i2c-mode/#comments</comments>
		<pubDate>Wed, 14 Oct 2009 08:33:50 +0000</pubDate>
		<dc:creator>Ian</dc:creator>
				<category><![CDATA[Bus Pirate]]></category>
		<category><![CDATA[binmode]]></category>
		<category><![CDATA[bitbang]]></category>
		<category><![CDATA[I2C]]></category>
		<category><![CDATA[raw io]]></category>

		<guid isPermaLink="false">http://dangerousprototypes.com/?p=1642</guid>
		<description><![CDATA[
See the latest version in the documentation wiki.
The Bus Pirate&#8217;s new binary modes provide a consistent, logical way to script actions from Python, Perl, etc. We already introduced the new binary bitbang and SPI modes, today we&#8217;ll document the binary I2C mode. Binary I2C will be in the v2.6 firmware release, for now you can [...]]]></description>
			<content:encoded><![CDATA[<p><img class="alignnone size-full wp-image-1647" title="binic2" src="http://dangerousprototypes.com.php5-11.dfw1-1.websitetestlink.com/wp-content/media/2009/10/binic2.png" alt="binic2" width="450" height="276" /></p>
<p><em>See the <a href="http://dangerousprototypes.com/docs/I2C_(binary)">latest version</a> in the documentation wiki.</em></p>
<p>The Bus Pirate&#8217;s new binary modes provide a consistent, logical way to script actions from Python, Perl, etc. We already introduced the new binary <a href="http://dangerousprototypes.com/2009/10/09/bus-pirate-raw-bitbang-mode/">bitbang</a> and <a href="http://dangerousprototypes.com/2009/10/08/bus-pirate-raw-spi-mode/">SPI</a> modes, today we&#8217;ll document the binary I2C mode. Binary I2C will be in the v2.6 firmware release, for now you can <a href="http://code.google.com/p/the-bus-pirate/source/browse/#svn/trunk/firmware/v2-nightly">grab the v2.6 nightly compile</a>.</p>
<p>We want your scripts! If you script something for any of the new modes, in any language, we&#8217;d like to host it in the <a href="http://code.google.com/p/the-bus-pirate/source/browse/#svn/trunk/scripts">example scripts folder</a>. We&#8217;ll send Bus Pirate probe cable kits to two authors of  Bus Pirate binary mode scripts posted by the end of next week (October 24th, 2009).</p>
<p>Binary I2C mode specification follows after the break.</p>
<p><span id="more-1642"></span><strong>Binary I2C mode command table</strong></p>
<ul>
<li>00000000 &#8211; Exit to bitbang mode, responds &#8220;BBIOx&#8221;</li>
<li>00000001 – Mode version string (I2C1)</li>
<li>00000010 – Send I2C start bit</li>
<li>00000011 – Send I2C stop bit</li>
<li>00000100 &#8211; I2C read byte</li>
<li>00000110 &#8211; Send I2C ACK bit</li>
<li>00000111 &#8211; Send I2C NACK bit</li>
<li>00001111 &#8211; Start bus sniffer</li>
<li>0001xxxx – Bulk transfer, send 1-16 bytes (0=1byte!)</li>
<li>0100wxyz – Configure peripherals w=power, x=pullups, y=AUX, z=CS</li>
<li>011000xx &#8211; Set I2C speed, 3=~400kHz, 2=~100kHz, 1=~50kHz, 0=~5kHz</li>
</ul>
<p>Enter binary I2C mode by first <a href="http://dangerousprototypes.com/2009/10/09/bus-pirate-raw-bitbang-mode/">entering bitbang mode</a>, then send 0&#215;02 to enter I2C mode.</p>
<p>Most I2C mode commands are a single byte. Commands generally return 1 for success, 0 for failure.</p>
<p><em>00000000 &#8211; Exit to bitbang mode, responds &#8220;BBIOx&#8221;</em></p>
<p>This command resets the Bus Pirate into raw bitbang mode from the user terminal. It also resets to raw bitbang mode from raw I2C mode, or any other protocol mode. This command always returns a five byte bitbang version string &#8220;BBIOx&#8221;, where x is the current bitbang protocol version (currently 1).</p>
<p><em>00000001 – Display mode version string, responds &#8220;I2Cx&#8221;</em></p>
<p>Once in binary I2C mode, send 0×01 to get the current mode version string.  The Bus Pirate responds ‘I2Cx’, where x is the raw I2C protocol version (currently 1). Get the version string at any time by sending 0×01 again. This command is the same in all binary modes, the current mode can always be determined by sending 0&#215;01.</p>
<p><em>00000010 – I2C start bit</em></p>
<p>Send an I2C start bit. Responds 0&#215;01.</p>
<p><em>00000011 – I2C stop bit</em></p>
<p>Send an I2C stop bit. Responds 0&#215;01.</p>
<p><em>00000100 &#8211; I2C read byte</em></p>
<p>Reads a byte from the I2C bus, returns the byte. <em>You must ACK or NACK each byte manually!</em></p>
<p><em>00000110 &#8211; ACK bit</em></p>
<p>Send an I2C ACK bit after reading a byte. Tells a slave device that you will read another byte. Responds 0&#215;01.</p>
<p><em>00000111 &#8211; NACK bit</em></p>
<p>Send an I2C NACK bit after reading a byte. Tells a slave device that you will stop reading, next bit should be an I2C stop bit. Responds oxo1.</p>
<p><em>00001111 &#8211; Start bus sniffer</em></p>
<p>Sniff traffic on an I2C bus.</p>
<ul>
<li>[/]  &#8211; Start/stop bit</li>
<li>\ &#8211; escape character precedes a data byte value</li>
<li>+/-  &#8211; ACK/NACK</li>
</ul>
<p>Sniffed traffic is encoded according to the table above. Data bytes are escaped with the &#8216;\&#8217; character. Send a single byte to exit, Bus Pirate responds 0&#215;01 on exit.</p>
<p><em>0001xxxx – Bulk I2C write, send 1-16 bytes (0=1byte!)</em></p>
<p>Bulk I2C allows multi-byte writes. The Bus Pirate expects xxxx+1 data bytes. Up to 16 data bytes can be sent at once. Note that 0000 indicates 1 byte because there’s no reason to send 0.</p>
<p>BP replies 0×01 to the bulk I2C command. After each data byte the Bus Pirate returns the ACK (0&#215;00) or NACK (0&#215;01) bit from the slave device.</p>
<p><em>0100wxyz – Configure peripherals w=power, x=pullups, y=AUX, z=CS</em></p>
<p>Enable (1) and disable (0) Bus Pirate peripherals and pins. Bit w enables the power supplies, bit x toggles the on-board pull-up resistors, y sets the state of the auxiliary pin, and z sets the chip select pin. Features not present in a specific hardware version are ignored. Bus Pirate responds 0×01 on success.</p>
<p>Note: CS pin always follows the current HiZ pin configuration. AUX is always a normal pin output (0=GND, 1=3.3volts).</p>
<p><em>NOTE: due to a typo this was previously command 0110.</em></p>
<p><span style="text-decoration: line-through;"><em>0110000x &#8211; Set I2C speed, 1=high (50kHz) 0=low (5kHz)</em></span></p>
<p>011000xx &#8211; Set I2C speed, 3=~400kHz, 2=~100kHz, 1=~50kHz, 0=~5kHz (updated in v4.2 firmware)</p>
<p>The last bit of the speed command determines the I2C bus speed. Binary mode currently uses the software I2C library, though it may be configurable in a future update. Startup default is high-speed. Bus Pirate responds 0×01 on success.</p>
<p><em>NOTE: due to a typo this was previously command 0100.</em></p>
]]></content:encoded>
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		<slash:comments>14</slash:comments>
		</item>
		<item>
		<title>Bus Pirate: Binary bitbang mode</title>
		<link>http://dangerousprototypes.com/2009/10/09/bus-pirate-raw-bitbang-mode/</link>
		<comments>http://dangerousprototypes.com/2009/10/09/bus-pirate-raw-bitbang-mode/#comments</comments>
		<pubDate>Fri, 09 Oct 2009 06:48:37 +0000</pubDate>
		<dc:creator>Ian</dc:creator>
				<category><![CDATA[Bus Pirate]]></category>
		<category><![CDATA[binmode]]></category>
		<category><![CDATA[bitbang]]></category>
		<category><![CDATA[raw io]]></category>

		<guid isPermaLink="false">http://dangerousprototypes.com/?p=1511</guid>
		<description><![CDATA[
See the latest version in the documentation wiki.
There&#8217;s two new binary I/O libraries in the v2.3 Bus Pirate firmware. Raw bitbang mode provides direct control over the Bus Pirate pins and hardware using a simple single-byte protocol. We discussed the new raw SPI mode yesterday.
Hopefully the raw access modes inspire some interesting new Bus Pirate [...]]]></description>
			<content:encoded><![CDATA[<p><img class="alignnone size-full wp-image-1546" title="rawspi" src="http://wherelabs.files.wordpress.com/2009/10/rawspi.png" alt="rawspi" width="425" height="260" /></p>
<p><em>See the <a href="http://dangerousprototypes.com/docs/Bitbang">latest version</a> in the documentation wiki.</em></p>
<p>There&#8217;s two new binary I/O libraries in the v2.3 Bus Pirate firmware. Raw bitbang mode provides direct control over the Bus Pirate pins and hardware using a simple single-byte protocol. We discussed the new <a href="http://dangerousprototypes.com/2009/10/08/bus-pirate-raw-spi-mode/">raw SPI mode</a> yesterday.</p>
<p>Hopefully the raw access modes inspire some interesting new Bus Pirate tools using PC software. There&#8217;s already <a href="http://dangerousprototypes.com/2009/10/08/avrdude-patch-program-avrs-with-the-bus-pirate/">a patch for AVRDude</a> AVR programmer in the works.</p>
<p>Full documentation of the raw bitbang binary I/O mode after the break.</p>
<p><span id="more-1511"></span></p>
<p><strong>Commands</strong></p>
<ul>
<li>00000000 &#8211; Reset, responds &#8220;BBIO1&#8243;</li>
<li>00000001  &#8211; Enter <a href="http://dangerousprototypes.com/2009/10/08/bus-pirate-raw-spi-mode/">binary SPI mode</a>, responds &#8220;SPI1&#8243;</li>
<li>00000010 &#8211; Enter <a href="http://dangerousprototypes.com/2009/10/14/bus-pirate-binary-i2c-mode/">binary I2C mode</a>, responds &#8220;I2C1&#8243;</li>
<li>00000011 &#8211; Enter <a href="http://dangerousprototypes.com/2009/10/19/bus-pirate-binary-uart-mode/">binary UART mode</a>, responds &#8220;ART1&#8243;</li>
<li>00000100 &#8211; Enter <a href="http://dangerousprototypes.com/2009/10/20/bus-pirate-binary-1-wire-mode/">binary 1-Wire mode</a>, responds &#8220;1W01&#8243;</li>
<li>00000101 &#8211; Enter <a href="http://dangerousprototypes.com/2009/10/27/binary-raw-wire-mode/">binary raw-wire mode</a>, responds &#8220;RAW1&#8243;</li>
<li>0000xxxx &#8211; Reserved for future raw protocol modes</li>
<li>00001111 &#8211; Reset Bus Pirate (returns to user terminal)</li>
<li>00010000 &#8211; Short <a href="http://dangerousprototypes.com/2009/10/16/self-test-in-binary-mode/">binary mode self-test</a></li>
<li>00010001 &#8211; Long test (requires jumpers between +5 and Vpu, +3.3 and ADC)</li>
<li>00010010 &#8211; Setup pulse-width modulation (requires 5 byte setup)</li>
<li>00010011 &#8211; Clear/disable PWM</li>
<li>00010100 &#8211; Take voltage probe measurement (returns 2 bytes)</li>
<li>010xxxxx  &#8211; Set pins as input(1) or output(0), responds with read</li>
<li>1xxxxxxx  &#8211; Set pins high (1) or low (0), responds with read</li>
</ul>
<p>The bitbang protocol uses a single byte for all commands. The default start-up state is pin input (HiZ).</p>
<p><em>00000000 &#8211; Reset, responds &#8220;BBIO1&#8243;</em></p>
<p>This command resets the Bus Pirate into raw bitbang mode from the user terminal. It also resets to raw bitbang mode from raw SPI mode, or any other protocol mode. This command always returns a five byte bitbang version string &#8220;BBIOx&#8221;, where x is the current protocol version (currently 1).</p>
<p>Some terminals send a NULL character (0&#215;00) on start-up, causing the Bus Pirate to enter binary mode when it wasn&#8217;t wanted. To get around this, you must now enter 0&#215;00 <strong>at least 20 times</strong> to enter raw bitbang mode.</p>
<p><em>Note:</em> The Bus Pirate user terminal could be stuck in a configuration menu when your program attempts to enter binary mode. One way to ensure that you&#8217;re at the command line is to send &lt;enter&gt; at least 10 times, and then send &#8216;#&#8217; to reset. Next, send 0&#215;00 to the command line 20+ times until you get the BBIOx version string.</p>
<p><em>00000001  &#8211; Enter binary SPI mode, responds &#8220;SPI1&#8243;</em></p>
<p>After entering bitbang mode, you can  enter other binary protocol modes. <a href="http://dangerousprototypes.com/2009/10/08/bus-pirate-raw-spi-mode/">Binary SPI mode is documented here</a>.</p>
<p>00000010 &#8211; Enter binary I2C mode, responds &#8220;I2C1&#8243;</p>
<p><a href="http://dangerousprototypes.com/2009/10/14/bus-pirate-binary-i2c-mode/">Binary I2C mode is documented here</a>.</p>
<p>00000011 &#8211; Enter binary UART mode, responds &#8220;ART1&#8243;</p>
<p><a href="http://dangerousprototypes.com/2009/10/19/bus-pirate-binary-uart-mode/">Binary UART mode is documented here</a>.</p>
<p>00000100 &#8211; Enter binary 1-Wire mode, responds &#8220;1W01&#8243;</p>
<p><a href="http://dangerousprototypes.com/2009/10/20/bus-pirate-binary-1-wire-mode/">Binary 1-Wire mode is documented here</a>.</p>
<p>00000101 &#8211; Enter binary raw-wire mode, responds &#8220;RAW1&#8243;</p>
<p><a href="http://dangerousprototypes.com/2009/10/27/binary-raw-wire-mode/">Binary raw-wire mode is documented here</a>.</p>
<p>00001111 &#8211; Reset Bus Pirate</p>
<p>The Bus Pirate responds 0&#215;01 and then performs a complete hardware reset. The hardware and firmware version is printed (same as the &#8216;i&#8217; command in  the terminal), and the Bus Pirate returns to the user terminal interface. Send 0&#215;00 20 times to enter binary mode again.</p>
<p>Note: there may be garbage data between the 0&#215;01 reply and the version information as the PIC UART initializes.</p>
<p>0001000x &#8211; Bus Pirate self-tests</p>
<p><a href="http://dangerousprototypes.com/2009/10/16/self-test-in-binary-mode/">Binary self tests are documented here</a>. Available only in v2go and v3 hardware.</p>
<p>00010010 &#8211; Setup pulse-width modulation (requires 5 byte setup)</p>
<p>Configure and enable pulse-width modulation output in the AUX pin. Requires a 5 byte configuration sequence. Responds 0&#215;01 after a <em>complete sequence</em> is received. <span style="text-decoration: underline;"><em>The PWM remains active after leaving binary bitbang mode!</em></span></p>
<p>Equations to calculate the PWM frequency and period are in the <a href="http://ww1.microchip.com/downloads/en/DeviceDoc/39706a.pdf">PIC24F output compare manual</a>. Bit 0 and 1 of the first configuration byte set the prescaler value. The Next two bytes set the duty cycle register, high 8bits first. The final two bytes set the period register, high 8bits first.</p>
<p>00010011 &#8211; Clear/disable PWM</p>
<p>Clears the PWM, disables PWM output. Responds 0&#215;01.</p>
<p>00010100 &#8211; Take voltage probe measurement (returns 2 bytes)</p>
<p>Take a measurement from the Bus Pirate voltage probe. Returns a 2 byte ADC reading, high 8bits come first. To determine the actual voltage measurement: (ADC/1024)*3.3volts*2; or simply (ADC/1024)*6.6.</p>
<p>010xxxxx  &#8211; Configure  pins as input(1) or output(0): AUX|MOSI|CLK|MISO|CS</p>
<p>Configure pins as an input (1) or output(0). The pins are mapped to the lower five bits in this order:</p>
<p>AUX|MOSI|CLK|MISO|CS.</p>
<p>The Bus pirate responds to each direction update with a byte showing the current state of the pins, regardless of direction. This is useful for open collector I/O modes.</p>
<p><em>Note: updated to correct order on 16/JAN/10</em></p>
<p>1xxxxxxx   &#8211; Set on (1) or off (0): POWER|PULLUP|AUX|MOSI|CLK|MISO|CS</p>
<p>The lower 7bits of the command byte control the Bus Pirate pins and peripherals. Bitbang works like a <a href="http://hackaday.com/2009/09/22/introduction-to-ftdi-bitbang-mode/">player piano or bitmap</a>. The  Bus Pirate pins map to the bits in the command byte as follows:</p>
<p>1|POWER|PULLUP|AUX|MOSI|CLK|MISO|CS</p>
<p>The Bus pirate responds to each update with a byte in the same format that shows the current state of the pins.</p>
<p><em>Note: updated to correct order on 16/JAN/10</em></p>
<p><strong>Key Points</strong></p>
<ul>
<li>Send 0&#215;00 to the user terminal <strong>20 times</strong> to enter the raw binary bitbang mode.</li>
<li>Send 0&#215;0F to exit raw bitbang mode and reset the Bus Pirate.</li>
<li>Other raw protocol modes are accessible from within bitbang mode, 0&#215;00 always returns to raw bitbang mode and prints the version string.</li>
<li>There is a slight settling delay between pin updates, currently about 5us.</li>
</ul>
<p><strong>Updates</strong></p>
<ul>
<li><a href="http://dangerousprototypes.com/2009/10/12/bus-pirate-binmode-perl-test-script/">Here&#8217;s a test script in Perl</a>.</li>
</ul>
]]></content:encoded>
			<wfw:commentRss>http://dangerousprototypes.com/2009/10/09/bus-pirate-raw-bitbang-mode/feed/</wfw:commentRss>
		<slash:comments>11</slash:comments>
		</item>
		<item>
		<title>Bus Pirate: Raw SPI mode</title>
		<link>http://dangerousprototypes.com/2009/10/08/bus-pirate-raw-spi-mode/</link>
		<comments>http://dangerousprototypes.com/2009/10/08/bus-pirate-raw-spi-mode/#comments</comments>
		<pubDate>Thu, 08 Oct 2009 07:40:09 +0000</pubDate>
		<dc:creator>Ian</dc:creator>
				<category><![CDATA[Bus Pirate]]></category>
		<category><![CDATA[binmode]]></category>
		<category><![CDATA[bitbang]]></category>
		<category><![CDATA[raw io]]></category>
		<category><![CDATA[spi]]></category>

		<guid isPermaLink="false">http://dangerousprototypes.com/?p=1526</guid>
		<description><![CDATA[
See the latest version in the documentation wiki.
Raw SPI is a new mode that provides high-speed access to the Bus Pirate SPI hardware. It was developed in conjunction with Michal Ludvig, so that AVRDude can use the  Bus Pirate to program AVR microcontrollers and EEPROMs.
Firmware v2.3 includes two new raw I/O modes that give computer [...]]]></description>
			<content:encoded><![CDATA[<p><img class="alignnone size-full wp-image-1546" title="rawspi" src="http://wherelabs.files.wordpress.com/2009/10/rawspi.png" alt="rawspi" width="425" height="260" /></p>
<p><em>See the <a href="http://dangerousprototypes.com/docs/SPI_(binary)">latest version</a> in the documentation wiki.</em></p>
<p>Raw SPI is a new mode that provides high-speed access to the <a href="http://dangerousprototypes.com/bus-pirate-manual/">Bus Pirate</a> SPI hardware. It was <a href="http://dangerousprototypes.com/2009/10/08/avrdude-patch-program-avrs-with-the-bus-pirate/">developed in conjunction with Michal Ludvig</a>, so that <a href="http://www.nongnu.org/avrdude/">AVRDude</a> can use the  Bus Pirate to program AVR microcontrollers and EEPROMs.</p>
<p><a href="http://dangerousprototypes.com/2009/10/07/bus-pirate-major-uart-fix/">Firmware v2.3</a> includes two new raw I/O modes that give computer software and scripts direct access to  the Bus Pirate hardware. Hopefully this opens the door to a whole new class of Bus Pirate applications, like chip programmers. In this post we describe the raw SPI access mode. We&#8217;ll describe the raw bitbang mode in a few days. The protocol is documented below the break.</p>
<p><span id="more-1526"></span></p>
<p><strong>Raw SPI mode command table<br />
</strong></p>
<ul>
<li>00000000 &#8211; Enter raw bitbang mode, reset to raw bitbang mode</li>
<li> 00000001 – SPI mode/rawSPI version string (SPI1)</li>
<li>00000010 – CS low (0)</li>
<li>00000011 – CS high (1)</li>
<li>00001101 &#8211; Sniff all SPI traffic</li>
<li>00001110 &#8211; Sniff when CS low</li>
<li>00001111 &#8211; Sniff when CS high</li>
<li>0001xxxx – Bulk SPI transfer, send 1-16 bytes (0=1byte!)</li>
<li>0100wxyz – Configure peripherals, w=power, x=pullups, y=AUX, z=CS</li>
<li>01100xxx – Set SPI speed, 30, 125, 250khz; 1, 2, 2.6, 4, 8MHz</li>
<li>1000wxyz – SPI config, w=output type, x=idle, y=clock edge, z=sample</li>
</ul>
<p>Commands are a single byte, except bulk SPI transfers. The Bus Pirate responds to SPI write commands with the data read from the SPI bus during the write. Most other commands return 0&#215;01 for success, or 0&#215;00 for failure/unknown command.</p>
<p><strong>Key points<br />
</strong></p>
<ul>
<li>Send the raw byte value 0&#215;00 into the user command prompt <strong>20 times</strong> to enter bitbang mode.</li>
<li>Enter 0&#215;01 in bitbang mode to enter raw SPI mode.</li>
<li>Return to raw bitbang mode from raw SPI mode by sending 0&#215;00 <strong>one time</strong>.</li>
<li>Operations that write a byte to the SPI bus also return a byte read from the SPI bus.</li>
<li>Hex values shown here, like 0&#215;00, represent actual byte values; not typed ASCII entered into a terminal.</li>
<li>Other values are shown as 8bit binary numbers. Here&#8217;s a <a href="http://www.mathsisfun.com/binary-decimal-hexadecimal-converter.html">binary-&gt;decimal-&gt;hex converter</a>.</li>
</ul>
<p><strong>Commands</strong></p>
<p><em>00000000 &#8211; Enter raw bitbang mode, reset to raw bitbang mode </em></p>
<p>This command has two purposes. First, send it to the command line interface 20 times to enter the raw bitbang binary mode. It&#8217;s also used to exit the raw SPI mode and return to raw bitbang mode.</p>
<p>Send the value 0&#215;00 to the Bus Pirate command line interface <strong>20 times</strong> to enter raw bitbang mode. The Bus Pirate replies &#8216;BBIOx&#8217;, where x is the raw bitbang version number (currently 1).</p>
<p>Once in raw SPI mode (see command 00000001), the 0&#215;00 command returns to raw bitbang mode. Send 0&#215;00 <strong>once</strong> to return to raw bitbang mode.</p>
<p><em>00000001 &#8211; Enter raw SPI mode, display version string</em></p>
<p>Once in raw bitbang mode, send 0&#215;01 to enter raw SPI mode. The Bus Pirate responds &#8216;SPIx&#8217;, where x is the raw SPI protocol version (currently 1). Get the version string at any time by sending 0&#215;01 again.</p>
<p><em>0000001x &#8211; CS high (1) or low (0) </em></p>
<p>Toggle the Bus Pirate chip select pin, follows HiZ configuration setting. CS high is pin output at  3.3volts, or HiZ. CS  low is pin output at  ground. Bus Pirate responds 0&#215;01.</p>
<p><em>00001101 &#8211; Sniff all SPI traffic, 0000111x &#8211; Sniff when CS low(0)/high(1) <strong>(updated in v5.1)</strong><br />
</em></p>
<p>The SPI sniffer is implemented in hardware and should work up to 10MHz. It follows the configuration settings you entered for SPI mode. The sniffer can read all traffic, or filter by the state of the CS pin.</p>
<ul>
<li>[/]  &#8211; CS enable/disable</li>
<li>\xy &#8211; escape character (\) precedes two byte values X (MOSI pin) and Y (MISO pin) <strong>(updated in v5.1)</strong></li>
</ul>
<p>Sniffed traffic is encoded according to the table above. The two data bytes are escaped with the &#8216;\&#8217; character to help locate data in the stream.</p>
<p>Send &#8216;r&#8217; to restart the sniffer without returning to SPI mode. Send any other byte to exit, Bus Pirate responds 0&#215;01 on exit.</p>
<p>If the sniffer can&#8217;t keep with the SPI data, the MODE LED turns off and the sniff is aborted. <strong>(new in v5.1)</strong></p>
<p><em>0001xxxx &#8211; Bulk SPI transfer, send/read 1-16 bytes (0=1byte!)</em></p>
<p>Bulk SPI allows direct byte reads and writes. The Bus Pirate expects xxxx+1 data bytes. Up to 16 data bytes can be sent at once, each returns a byte read from the SPI bus during the write.</p>
<p>Note that 0000 indicates 1 byte because there&#8217;s no reason to send 0. BP replies 0&#215;01 to the bulk SPI command, and returns the value read from SPI after each data byte write.</p>
<p><em>0100wxyz &#8211; Configure peripherals w=power, x=pull-ups, y=AUX, z=CS</em></p>
<p>Enable (1) and disable (0) Bus Pirate peripherals and pins. Bit w enables the power supplies, bit x toggles the on-board pull-up resistors, y sets the state of the auxiliary pin, and z sets the chip select pin. Features not present in a specific hardware version are ignored. Bus Pirate responds 0&#215;01 on success.</p>
<p>Note: CS pin always follows the current HiZ pin configuration. AUX is always a normal pin output (0=GND, 1=3.3volts).</p>
<p><em>01100xxx -  SPI speed </em></p>
<p>000=30kHz, 001=125kHz, 010=250kHz, 011=1MHz, 100=2MHz, 101=2.6MHz, 110=4MHz, 111=8MHz</p>
<p>This command sets the SPI bus speed according to the values shown. Default startup speed is 000 (30kHz).</p>
<p><em>1000wxyz &#8211; SPI config, w=HiZ/3.3v, x=CKP idle, y=CKE edge, z=SMP sample</em></p>
<p>This command configures the SPI settings. Options and start-up defaults are the same as the user terminal SPI mode. w= pin output HiZ(0)/3.3v(1), x=CKP clock idle phase (low=0), y=CKE clock edge (active to idle=1), z=SMP sample time (middle=0). The Bus Pirate responds 0&#215;01 on success.</p>
<p>Default raw SPI startup condition is 0010. HiZ mode configuration applies to the SPI pins and the CS pin, but not the AUX pin. See the <a href="http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en026374">PIC24FJ64GA002 datasheet</a> and the <a href="http://ww1.microchip.com/downloads/en/DeviceDoc/39699b.pdf">SPI section</a>[PDF] of the <a href="http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&amp;nodeId=2575">PIC24 family manual</a> for more about the SPI configuration settings.</p>
<p><span style="text-decoration: line-through;"><em>0010xxxx, 0011yyyy &#8211; Enter SPI data byte in nibbles, read SPI byte</em></span><em> Deprecated in v5.1<br />
</em></p>
<p>Data bytes can also be entered in two nibbles using this pair of commands. 0011yyyy loads the upper 4 bits of a data byte. 0010xxxx loads the  lower 4 bits of the data byte, and writes it to the SPI bus. The bus write returns a byte read.</p>
<p>A byte is transmitted over SPI each time the low bits are sent. Be sure to send the upper bits first, then send the lower bits to complete the data and transmit it. If the upper four bits are the same as the previous byte, then you can increase speed by  sending just the lower four bits.</p>
<p>Entering the upper 4 bits returns 1 for success, or 0 for failure. Entering the low bits returns a byte read from the SPI bus.</p>
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