Tablet controlled DSO

[presslab]

It seems to me that readily available core technology has been converging allowing for the possibility of a high performance yet (relatively) low cost DSO. I've been mulling over the idea and I'd like to start incubating this open source design here.

First, start with a low cost Android tablet. These are a commodity item now, and often people will already have one. This will be the GUI for the user, although the DSO itself will also contain knobs and buttons so as to only require the touch screen for more advanced functions. The communication interface will be Wifi, allowing direct connection or through an access point.

The DSO performance specifications will be 2/4 channels, 3.0 GSPS max, and 600 MHz bandwidth. An optional add-on will be a 32 channel, 400 MHz max logic analyzer. Some key components of the DSO hardware will be as follows: Xilinx Zynq-7000 FPGA/ARM micro, TI ADC07D1520RB ADC, TI LMH6518 PGA. The FPGA will handle writes to SDRAM from the ADC, and the ARM Cortex-A9 micro will do some pre-processing of the signal before sending just the parts needed along to the tablet computer. Linux will be used to leverage the TCP/IP support, among other things.

The logic analyzer design will be used from the BASTLI BitHound, which has impressive performance and is open source as well.
http://www.bastli.ethz.ch/index.php?page=BitHoundEn

My next step is to work on an overall block diagram and pencil out the analog design. What do you guys think? Pie in the sky? I believe I have the expertise and experience to see this through to fruition, and I also welcome any ideas and assistance!

[hlipka]

The ADC07D1520 is priced as 135$ in 1k quantity, and about 200$ in 1s. So even that will set you back 400 dollar just for the 2 ADCs. The Zync Z7020 (the second-lowest of the series) is about the same. So I would assume 1000$ just for parts - this way above what I would call 'relatively low cost'. Yes, it is less expensive than what you pay for e.g. Agilent - but a Rigol scope might be just cheaper for the same performance.
But if you want to do it just for fun, and to own such a scope afterwards - go ahead! This will be a great learning experience. I personally would start with a scope less ambitious, like 100MSpS or so. That way, one can learn about most of the pitfalls, without investing such a large sum of money.

[alanh]

XC7Z0x0's aren't cheap in low quantity (and not much less in huge qty). And are a maximum .8mm BGA so your board will be at least 4 layers and thus fulfillment choices drop.

I have thought about a really cheap really high bandwidth logic analyzer though. You could use the 7:1 LVDS gearing present in a MachXO2 with an internally sourced reference clock to de-serialize high frequency samplings. Use a simple leaded 16-bit DDR1 memory device to provided an extended FIFO through the PLD. Then use a USB 2.0 peripheral capable of a high speed bridging to a 8 or 16 bit FIFO like a FX2 to get the data off fast enough to further extend your capture time.

[presslab]

Thanks for your comments! Yes, I agree it does seem expensive, that's why I used the term "(relatively) low cost" because a similar (relative) device would be much more expensive. If you can find anything close in price, by all means let me know. For example, a TDS3034C is $8750, and won't have as high of bandwidth or sampling rate. And to clarify, each TI ADC is good for two channels, so the $400 would be for a 4 channel scope.

The market is saturated with low bandwidth, low MSPS scopes. Other than a purely academic exercise I think it's best to skip over designing something like this.

While this will be OSH, I think it would be practical to make a small production run rather than try to hand assemble these things. I have built quite a few 0.8mm pitch BGAs prototypes by hand with a pretty good yield, but at the cost of these Zynq chips I think it's best left to a professional to put the BGAs down. For the time being though, I plan to use the Xilinx Zedboard for development and a custom FMC card with the ADC and AFE.

[alanh]

I don't have enough advanced analog experience to be directly helpful in that domain, so good luck. I can imagine that much of the premium you pay for the higher end scopes is for experience and quality reputation. Especially in designing front ends that are resilient to transients and out of limit conditions without stressing silicon or significantly adversely affecting signal integrity. Even FET probes themselves are essential to high speed analysis and out of most low cost budgetary ranges.

I do have a Zynq eval board, a couple of Zeds, and a few Parallella boards pending from the kick-start. So I'd be happy to lend a hand in testing and contributing to the digital side of the effort. At the relative price ranges you are committing to early, hiring out reliable placement of BGAs is reasonable while hand placing the rest of the parts later.

Your suggested starting point is also a great combination for software defined radio applications with a low noise amp on the front end.

[presslab]

Thanks for the offer of assistance alanh. Maybe by the time this project comes to fruition the Zynq will be $15 like Xilinx says; probably not though. ;)

If you check out the end of the datasheet here, there are some circuits for the AFE. I've done analog stuff and RF stuff, this is somewhere in-between I guess. They don't show protection, which can be tricky to do without adding too much capacitance. It's a definite start, though.
http://www.ti.com/lit/ds/snosb21a/snosb21a.pdf

The ADC that I've selected is primarily designed for SDR as the "DI" and "DQ" outputs imply. It also has an impressive ENOB of 6.8 bits @ 748 MHz, which compares favorably to most scopes out there. I agree, it would be a great testbed for SDR with the FPGA and Cortex-A9.

[hlipka]

The ADC07D1520 can run 2 channels only with a sample rate of 1.5GSps - when you want 3GSps as stated above, you get only one channel. And, btw., it samples only with 7bit resolution :(

Yes, there are many low-sample-rate scopes out there. But I haven't yet to see one with more than 40 or 50 MSps, which I would consider as the minimum to be useful for the hobbyist (since it would allow looking at SPI or I2C signals with reasonable quality). I'm planning (in my head right now :) a small scope with 2x40MSps and 512k sample depth - this is not so complicated, and should be great learning experience. It also doesn't require expensive stuff, and it should be possible to do it at home...

[presslab]

The ADC07D1520 can run 2 channels only with a sample rate of 1.5GSps - when you want 3GSps as stated above, you get only one channel. And, btw., it samples only with 7bit resolution :(

This is understood by me. The channel bonding is common in a lot of scopes, and I doubt I would ever need 4 channels at the full 3 GSPS. TI offers a higher resolution ADC for a lot more money, if desired. However the ENOB (effective number of bits) with this converter is 6.8 bits @ 748 MHz. This is better than most scopes out there; the AFE could degrade this further but the same problem would occur with a higher resolution ADC. Check out the ENOB graph of the DPO7000B - it's goes from 6.2 to 5.9 ENOB, albeit this is a much faster scope.
http://www.afc-ingenieros.com/uploads/Afc/InfoTecn/Osciloscopios/pdf/Bits%20Efectivos%20(ENOB)%20en%20las%20medidas%20con%20osciloscopios%2055W23761-0%20-%20AFC-.pdf

There is also the ability for oversampling, which is akin to the "high resolution" mode that a lot of scopes have. This will work fine for lower frequencies. I don't see the 7 bits as a limitation.

I'm planning (in my head right now :) a small scope with 2x40MSps and 512k sample depth - this is not so complicated, and should be great learning experience. It also doesn't require expensive stuff, and it should be possible to do it at home...

This is certainly a great project, and will undoubtedly be less expensive than what I'm doing. I already have a scope that exceeds this and part of my motivation is building myself a better scope. I would also like to do something more challenging than that.

[presslab]

Anyone have any comments about the overall architecture? How do you feel about using a tablet as a GUI? We have a couple touchscreen Tek scopes at my work and they are pretty annoying. Although they have a few knobs they force you to use the touchscreen to make simple adjustments. One thought is to have enough knobs and buttons on this box to do most stuff without touching the screen. The other thought is to have a few knobs but just design a better interface than the Tek scopes. The ones at work run Windows 7, which is pretty bad for touch input, in contrast to an Android tablet which is much better in that regard. Does anyone use a touchscreen scope that they actually like?

[matseng]

Can you explain the concept of ENOB, how can it be 6.8 bits? I certainly could read up on this myself but I'd guess that there are not only me here that might be puzzled by this and might be interested.

[presslab]

Can you explain the concept of ENOB, how can it be 6.8 bits? I certainly could read up on this myself but I'd guess that there are not only me here that might be puzzled by this and might be interested.

I'm no analog expert but I'll give you my take on it. ENOB is essentially the measurement of "real" bits of accuracy, taking into account the entire analog and digital chain. It's a SINAD (signal-to-noise and distortion) ratio, but represented in bits. It can't ever be more than your digital resolution, as an ideal ADC is +/-0.5 LSB due to quantization error.

So in more practical terms it means that the analog section of the ADC in question is quite good, and that nearly every bit you get out is as accurate as can be. It's very common that an ADCs ENOB go down as frequency goes up, but this one is excellent even at 748 MHz.

When spec'ing ENOB for an oscilloscope it includes the entire signal chain from the connector on the front. So the ENOB of this design will be worse than the 6.8 bits of the ADC, but the point here is that the ADC is not the sole limiting factor. There will likely be more than +/- 0.5 LSB of electrical noise as well, so this will make it easy to do oversampling (the so-called "high-resolution" more) to increase the resolution. This is one advantage to a high GSPS, in that you can do a lot of oversampling and still have a decent overall sampling rate. Practically this means that you will be able to measure to microvolts with a decent vertical resolution, at the expense of horizontal resolution.

[alanh]

I actually don't understand the concept of strapping a tablet on it. There is more than enough power in the Zynq PS to both manage sample acquisition and run an Android UI at the same time and much faster and efficiently as well. If you are going to pay that much for the component costs of everything else, go the extra inch and add a simple lcd+touch screen for $50. I would much rather run it in stand-alone mode anyway until I have something interesting to look at on bench PC screen. Especially if Android is built it. I can just email traces directly.

[presslab]

If you are going to pay that much for the component costs of everything else, go the extra inch and add a simple lcd+touch screen for $50. I would much rather run it in stand-alone mode anyway until I have something interesting to look at on bench PC screen.

Thanks for your thoughts. I can understand this, there would be less things to deal for sure. Could you get a nice screen for $50? Something like a Nexus 7 I'm thinking. On eBay, a replacement Nexus 7 screen is $68, no digitizer. Mainly I'm trying to leverage the volume pricing of a tablet to get a nice screen, and at least for me I own a few tablets so no need to buy something else. This also adds more to the hardware side of the project, both in terms of the mechanical packaging and the circuitry.

Have you ever wished for a remote screen on your scope? I've worked on a few machines that were very loud and I wished I could be in the other room while monitoring the DUT. Or the workbench has wires everywhere (especially using a logic analyzer) and you want easy access to the screen. Maybe keep the microphone close so you can say "Scope - single trigger". :P Some Tek, Agilent, R&S, etc. scopes have a "remote front panel" feature that runs on a PC. The Snap-On Verus Pro has a remote touch screen, the most similar to my idea.

The CPU burden of running Android vs pumping out IP is probably a wash. I don't know how much CPU I'll need for "digital phosphor", FFT, etc. but I would guess faster is better. The Android for Zynq is a few versions behind, I'm not sure how good the support will be in the future.

That said I've never used a scope with a remote screen, maybe it's stupid. Worst case I could add a real attached screen later, or just some double-sided tape! If the screen were used a ways away from the scope, the knobs wouldn't make much sense, but maybe the Android GUI will provide a compelling interface to supplement the knobs.