Low cost, high speed interconnect between FPGA and PC

[NiHaoMike]

Is there a cheap way to get a high speed interconnect (as in more than USB2 or Ethernet) between a Digilent Atlys FPGA board and a Core i7 desktop PC? (If it matters, the PC runs Linux.) Going from the PC to the FPGA seems simple enough with the use of HDMI but what about the reverse? Would it be possible to use a USB 3 to SATA converter and then have the FPGA operate as a "SCSI generic device"?

Ideally, I would want nearly 3Gbps (the maximum data rate coming from the ADC) of usable bandwidth (meaning PCIe?), but I can make do with less. Also, whatever solution is proposed must allow the FPGA to be reprogrammed without having to reboot the PC in order to use it afterwards.

[erdabyz]

Dunno if it needs to be real time but the DDR2 memory the board has can withstand that data rate. You could maybe use it as a temporary buffer to perform some sort of block compression of the data before sending it to the computer. Depending on the kind of signals you get from the ADC even by encoding the difference between two consecutive samples and not the samples themselves you could save lots of bits and that wouldn't require buffering.

3Gbps is very serious. The included VHDCI connector and the layout for it would have a hard time supporting such a data rate without compromising signal integrity. ATLYS is designed to work with several hundred megabit per second signals but I don't think ithe spartan 6 could operate its transceivers at max oomph without a pourpose-designed and optimized layout. You could also send the data in paralel and serialize it elsewhere in a dedicated chip with the proper layout. That wouldn't be cheap, though...

I hope that with some compression you could get down to a more reasonable data rate so it could be sent by cheap means out of the board.

[alanh]

What ADC are you talking about? One that you added? And how does it interface to the Altys board? The only thing I can imagine from what you are describing is something that does 250MHz/12 bit - ish. From the description I'm reading, there is nothing on that board already that runs aywhere near that fast.

Even the DDR2 memory interface running that fast in a full duplex FIFO is a bit theoretial. That alone is a clock/data rate of nearly 250/500 MHz.

As far as a lowest cost solution that would come close to what you describe is to mount a FPGA with a proper serdes on a PCIe card. Or perhaps add one or more FX3s to the board. But even the parallel interface speeds required by those solutions will require an integrated board to meet signal integrity.

[NiHaoMike]

It's an ADS5547 (14 bits at up to 210MSPS) on an add on board. The main application I'm looking at is SDR so I will need continuous streaming. I'll most likely do quite a bit of processing on the FPGA itself, but having the choice of streaming the raw ADC data would be very desirable.

Would it be possible to use one of the HDMI ports (not necessarily using the actual HDMI protocol) in order to greatly simplify the signal integrity issues?

[alanh]

For SDR you're going to have to pass the incoming signal through a few roll off filters to isolate the band of interest - either in the analog domain or digital - and if nothing else to filter out any roll over harmonics. And I can't imagine not doing AGC and FFT as the first stages of the input pipeline. So you can drop most of the sample data right there. Should help on requirements.

You could use HDMI, however the HDMI diff pairs are connected to standard IOs on that board and not serdes interfaces. So you are restricted to the io buffer rate of a Spartan 6. It might be fast enough of you use builtin gearing with a couple cables with 4 lanes each. But you would have to build the other end too as it would look nothing like TMDS. And there is just no way you could clock a HDMI video standard with enough pixel payload capacity to move the ADC data as an image with just standard IO buffers (at full 3gbps).