YetAnotherStepperDriver (a DRV8825 breakout module)

[katjap]

5 NEMA 17 steppers have been sitting in my drawer for almost a year. This pains me a lot, so i decided to make some driver boards so i can, you know... use them to build a reprap or maybe a PCB mill, or maybe something that could be a reprap or a PCB mill :) I designed this breakout around the DRV8825. It seems like a good driver chip that can deliver up to 3A with propper cooling (i only need 1.2A per motor but *shrugs*) and TI is sampling them.


(top polygon unfilled to make it easier to see)

I don't think there's anything unusual or novel about the design, but this is only the 2nd PCB i've ever designed (The first was a breakout for a thermocouple amp i used to build my reflow oven,) so this seemed like a good project. These modules are designed to connect to a booster pack i have yet to design for a Stellaris Launchpad ( overkill? perhaps..) via the FFC on the left side of the board. The motor would be powered by 12V from a computer PSU via the screw terminals on the bottom. I tried to stay away from .1" pins for the most part. I took inspiration from bearmos' cnc controller with the thermal vias.



The entire top and bottom of the board is a solid fill groundplane with 16 mil iso/seperation. I'm hoping this will help draw some heat from the driver.

The optical endstop switch if fed off the VBUS pin from the Stellaris. I want to use my stellaris for a couple of reasons. (1) i want to be able to copy gcode over mass storage device style, and have it print and (2) the lauchpad is already setup for usb. The breakout board these will plug into should have some type of SPI memory (probably SD card) that i'll write gcode to. I haven't put a lot of thought into this part yet, but it'll be the next project.

Any feedback would be really helpful! Did i put too many vias in? Will my capacitors go up in smoke? Do i need to use bigger caps or maybe some electrolytics? Is supplying my motor voltage right off a PSU really a good idea? Do i need to work on trying to seperate the ground plane for the motor voltage and the logic level voltages?

[matseng]

One thing I'd consider is to reroute the main motor power pin 4 VMA & pin 11 VMB. Now they are connected by a very narrow trace that also have three vias to pass before reaching VMB. Narrow trace + only 1 oz copper is a recipe for voltage losses.

Maybe routing the power to VMA/VMB between the pinpads and the thermal GND-pad might be a solution. You could then use a unbroken 20/24 mil track all the way.

[katjap]

That's a really good point, thank you! I'm also thinking about narrowing the traces to the motor outputs by about 1/2, but putting it on both sides of the board and strapping them together with vias, then running the voltage to VMA/VMB between the output terminals and running the current sense resistors between the thermal pad and the pins :)

[katjap]

YASD V0.2 changes:
-- Redid PCB layout. It's now on a Sick of Beige 6037.
-- The 4 screw terminal would no longer fit, so switched to a Molex KK-156 4 position
-- Traces to motor terminals are now 56 mil nearly all the way to the IC. The worst case is one that runs 10/12 mil for ~95 mil. most are much better then that. The TI evaluation module for DRV88xx has ~130 mil of 10 mil traces for each connection.
-- VMA/VMB are now much better connected via a sort of bus polygon that runs under the pinpad.




To Do:
-- Find out why i have 64 Stop Mask errors..all on stdlib parts.
-- Design Boosterpack for the Lauchpad.
-- Code
-- Maybe squeeze a 3.3v LDO in to power the endstop off VM instead of using usb voltage from the LP VBUS pin.
-- Clean everything up a bit and send for boards! :)

[katjap]

Looking at my vias i see i've unintentionally created a pattern....



That can't be good. 0_0

[naren]

Is the schematic the same one that's in the TI datasheet for the DRV8825?

I did a couple of boards based on the DRV8342 (does this hijack the thread!?) and DRV8825

DRV8432 (This one is based off the eval board TI puts out)

DRV8432 based board design

DRV8825 (This one is based on the Polulu driver module)

Still not complete imho.

-Naren

[bearmos]

hey there katjap, just now noticed this now (since it made the blog). after following matseng'e suggestion for traces, the supply lines look better.

Did i put too many vias in?

Never! :) They don't really hurt anything, although if the diameter is wide enough they'll tend to suck solder away from under the IC and cause voids (which can be a problem). You'll find that the further away from the IC you are, the less of a difference they make. DP had posted a good app note on the blog a while ago about via's under pads - they can be problematic for mass produced PCBA's.

Some comments (meant to be helpful):
- vias on the right side appear to be extremely close together (double check your ERC output to make sure they're not violating a minimum spacing constraint).
- on v 0.2 it looks like thermal reliefs have crept in on the top layer under the IC.
- double check the pull-back on your ground fill (I usually go with at least .01"/0.254mm isolation)
- ceramic power supply bypass caps should be as close to possible to the pins
- double check that your reference designators aren't under the components (you'll thank yourself for spending the extra time when you go to assemble/debug ;-))
- you may need a skillet/hotplate or toaster oven to assemble this

will the cap's go up in smoke?

A good rule of thumb is to double the supply voltage and you'll usually be fine (the 50V caps you have called out should be more than adequate).

Is supplying my motor voltage right off a PSU really a good idea?

The ATX supply can handle the current without a problem. With constant current drivers and steppers you'll generally find that you can get more speed with higher voltages. This is because the higher voltage helps to overcome the inductance of the motor coil when switching.

Do i need to work on trying to seperate the ground plane for the motor voltage and the logic level voltages?

On ATX supplies, GND is GND so they're no real isolation, plus your IC is generating the logic voltage, so it will also be referencing the same GND. Further, you'll need to be referencing his ground on your connector for your drive signals. So, truly separate motor and logic grounds here isn't a possibility. Generally, if you think about how your low-speed currents flow (path of least resistance (i.e. straight line)) and position components accordingly, you'll be fine with one ground plane.

You had mentioned you were staying away from 0.1" headers (0.1" pitch connectors would be OK for your currents, but not to 3A). Depending on how you have things setup, you may or may not like to be able to easily unplug the motor from the board, without having to remember pinouts/colors. If you're using this for a CNC setup, you might want to add a pass through connector with an RC filter for your home switch on this board, then run that signal through X3 - I tend to put home switches close to the steppers, having them go to the same board can be helpful. It depends on whether you want this to be more of a general purpose breakout vs something specific to your project.

[bearmos]

Is the schematic the same one that's in the TI datasheet for the DRV8825?

I did a couple of boards based on the DRV8342 (does this hijack the thread!?) and DRV8825

DRV8432 (This one is based off the eval board TI puts out)

drv8432.png

Welcome Naren! Dosen't the DRV8432 have an exposed pad? If so, you don't want to have traces under it (the soldermask will probably let you get away with it, but it's not good practice (IMO)). Also, you do want thermally conductive vias for heat sinking (like in your second board).

[naren]

The slug is on the topside.. so you can really slather it with thermal paste and setup a huge heatsink to cover the 3A it is supposed to put out

EDIT: I'll post a pic of the thing in a bit... let me get my camera out

EDIT: Not the best shot, but you get the idea... you are seeing it from the top...

-Naren

[bearmos]

I see, I didn't realize you were using a different chip from katjap. . .sorry about that. The topside thermal sink does seem nice (although the DRV8432 seems like it's on the expensive side - is TI trying to phase this out?) It's looking like 10-13 USD is the norm. . .

[katjap]

Some comments (meant to be helpful):

:)

- vias on the right side appear to be extremely close together (double check your ERC output to make sure they're not violating a minimum spacing constraint).

They pass ERC! (I know it's really hard to tell from a tiny PNG and i haven't released my eagle files yet) I'd still like to see if i can get a little more space on them though, without having to pass lots of power over longer 10/12 mil traces!

- on v 0.2 it looks like thermal reliefs have crept in on the top layer under the IC.

I don't know what that means?

- double check the pull-back on your ground fill (I usually go with at least .01"/0.254mm isolation)

I'm using 0.012"! ^^ i tried 0.02" last night but there were too many issues/I was too tired! LOL

- ceramic power supply bypass caps should be as close to possible to the pins

I didn't think i could get them a whole lot closer, but now i have!

- double check that your reference designators aren't under the components (you'll thank yourself for spending the extra time when you go to assemble/debug ;-))

Those have since been cleaned up, (Although at 32 mil i might need a magnifying lense to read them)

- you may need a skillet/hotplate or toaster oven to assemble this

The toaster was the first project! I'm super-excited about getting to use it ^^

[bearmos]

- vias on the right side appear to be extremely close together (double check your ERC output to make sure they're not violating a minimum spacing constraint).


They pass ERC! (I know it's really hard to tell from a tiny PNG and i haven't released my eagle files yet) I'd still like to see if i can get a little more space on them though, without having to pass lots of power over longer 10/12 mil traces!

Terribly sorry, I meant DRC (although I think you understood what I meant). Also, make sure you're using a file with constraints the board house can handle. You can double check the via/via spacing in the tabs just to make sure. ERC is for electrical rule checking, usually at the schematic level.

- "on v 0.2 it looks like thermal reliefs have crept in on the top layer under the IC."
I don't know what that means?

Here's a screenshot of what I'm talking about. In yellow, there are "thermal relief" vias, which do NOT conduct thermal energy (heat) well. In blue, there's a via that is directly connected (what you want). You can easily make the via's under the IC directly connected (top and bottom) by pouring copper fills over them (both sides of the board).

Thermal Via issue

thermalViaIssue.jpg (11.02 KiB) Viewed 1684 times

Some additional explanation via wikipedia:
http://en.wikipedia.org/wiki/Thermal_relief

BTW, this is looking great for your second board. I'm not sure if you've seen it, but there was a comment on the front page suggesting that you put in a way of adding a secondary heat sink, which is a good idea.

[katjap]

I cleaned up the lines a bit and corrected some part values (yay sleep!) C1 and C2 were nudged a bit closer as per bearmos' suggestions.

Cooling came up in the blog comments. i planned to mount the heatsink on the back of the boards if neccessary. I would bridge the gap between the heatsink and the bottom side of the board with thermal tape. Another idea i like is what they're doing at Avayanelectronics where they put a big hole in the PCB under the IC and then screw a bolt through the heatsink to contact the bottom of the chip. (They call it a PowerPeg.) The datasheets just suggest lots of PCB fill and vias like i did though :))

[katjap]

I tried throwing down a rectangle and it gave me lots of overlap/clearance errors (since you can't name a rectangle as a signal). I tried throwing down a rectangular polygon and it enforced the spacing (even though i set it to 0.004mil).

OOOOOOOOOH! I see.. i just had to turn thermals off on it! :)

[katjap]

Terribly sorry, I meant DRC (although I think you understood what I meant). Also, make sure you're using a file with constraints the board house can handle. You can double check the via/via spacing in the tabs just to make sure. ERC is for electrical rule checking, usually at the schematic level.

So did I. :) I'm using the rules Seeed posted on their Fusion PCB service, but i will double check :)

Here's a screenshot of what I'm talking about. In yellow, there are "thermal relief" vias, which do NOT conduct thermal energy (heat) well. In blue, there's a via that is directly connected (what you want). You can easily make the via's under the IC directly connected (top and bottom) by pouring copper fills over them (both sides of the board).

thermalViaIssue.jpg

Some additional explanation via wikipedia:
http://en.wikipedia.org/wiki/Thermal_relief

Figured out in my other reply :o)

BTW, this is looking great for your second board.

Thank You! :)

I'm not sure if you've seen it, but there was a comment on the front page suggesting that you put in a way of adding a secondary heat sink, which is a good idea.

It's on my mind now. I have a few ideas. heck i might just dump the whole thing in a tank of mineral oil. We just got our tax rebate check today, so an IR thermometer is on the short list.

I'm really thinking about just sticking that big hole under the IC though and then mounting the entire compliment of these to the side of a computer case with hex standoffs and screwing bolts with thermal paste through.