EZ-USB-FX1 based PSOC 3/5 programmer

[Zeta]

Since I was asked, I'm uploading eagle .sch and .brd files.

I've used PSOC1 devices for a while and I found them extremelly flexible and easy to use and I was really exited when I saw PSOC3 and PSOC5 devices. Unfortunatelly their kits and programmer are really expensive for an student like me, and i'm sure many other) so I wanted to make a cheap programmer.

Original post may be found here viewtopic.php?f=56&t=2823&start=30#p30169

At first, I was planing on uploading everything and asembling a "how to" once I completelly tested the board and polished (and complited) the schematics and board design, but a small mistake while soldering a QFN PSOC3 left me without target hardware (should have baked it before putting it on the reflow oven T_T). Unfortunately, I have already spent more than what my budged allows on electronic components in a month. So instead of delaying everything at least a month I'm uploading it so it may be of use to someone else.



The USB-SWD connector may be omited since its used to program PSOCs using their USB pins (and connector) rather than the dedicated JTAG/SWD pins. the reset switch may also be omited. Aditionally 0.1uF bypass capacitors should be added on every VDD pin.

To make it work, first make sure cyconsole can talk to the board. CyConsole can only talk to devices serviced by cypress' cyUSB driver. Unprogrammed and EEPROM-less EZ-USB devices should be configured automatically, but even after having installed PSOC programmer 3.13.1 and Cypress Suite USB 3.4.6, my winxp machine wouldn't recognise my FX1 chip so I made an .inf driver file (attached as a rar file on this post). You should point to it when windows ask for a driver.

Next step is to download the firmware using EZ-USB Interface in CyConsole. The firmware .hex file can be found in \%PSOC_Programmer_DIR%\Service\ftk_5_simfw.hex . Once the firmware is downloaded, windows should configure it automatically as a FirstTouchKit5 and it can be used with PSOC Programmer.



Firmware must be downloaded everytime the programmer is plugged into a USB port. To remove this requirement you can add an I2C EEPROM and program it with the FTK Unconfigured VID/PID or (if you are not going to use an FX1 chip for other devices) modify the FTK driver to service FX1's VID/PID.

If there is any question just ask me and I'll try my best to answer it.

[kmmankad]

Nice writeup and pics.I've posted a link to your creation over at the Cypress forums too,hope you dont mind.You mentioned you had the target hardware almost ready.Did you design a board for it?

[kripton2035]

hi,
it seems that these simple (and low cost) dev boards are the same as your programmer ?
they are more versatile too ?
http://cgi.ebay.com/ws/eBayISAPI.dll?ViewItem&item=230684823584

anyway your hack is a great job.

[Zeta]

@kripton2035 , yeah, you can use it, it has an ubeatable price. I dont know how this guys have such a low price. You would spend more on just the FX2LP alone. And you have the added benefit of having onboard EEPROM. I myselft like smaller compact tools that i dont have to be wiring everytime i use it.

[Zeta]

Yesterday I received an EZ-PSOC free PCB designed by kmmankad



and I remembered about his project. Last december I failed to program and debug a PSOC3 that I soldered and wired on a Schmartboard breakout board.



Soldering on a Schmartboard is really easy but it turns out that an 0805 0 ohm resistor that I used instead of a 0603 to connect a GND pin to the GND plane was shorting to VDD. Doh!. (I guess it was too late and I needed some sleep)

Today I solved the problem and connected it again and it all worked magically


Program/Read/Debug everything works on PSOC Creator



Checksum/read/Program/verify everything works on PSOC Programmer





I've already ordered some PSOCs in SSOP package (only have QFP-100 here) and will build my EZ-PSOC. I just wish it had the option to choose VDDio.

With this programmer and the EZ-PSOC board I've got a cheap PSOC3 experimenting kit :-)

[raob]

Hello zeta,

I am new to this forum. I have just begun working with PSoC 3. I have the following queries:

The first thing that I would like to know is the difference between EZ USB FX1 and JTAG/SWD interface, If yes, What are the differences?

I have a custom made PSoC 3 CY8C32XXXX development board. I use USB to bootload the application using Bootloader host. Of late, I am getting an error which says "Flash Row is not valid for the selected array". If I am not wrong, we get this error when the bootloader that resides in PSoC 3 is corrupted and to correct this we need a JTAG/SWD debugger. Am I right? If Yes or No how do I correct it?

[nickjohnson]

I've just finished designing a programmer based off this design.



Changes I've made:

• Converted to SMD parts instead of thru-hole ones
• Micro USB socket instead of USB A plug
• 10 pin 0.05" Miniprog 3 connector
• Removed reset button
• Refactored to (sort-of) SoB case size 4025
• Device power is now controlled from USB VCC instead of the 3.3v regulator
• Added a footprint for an EEPROM so custom VID/PID can be stored.

I say 'sort of' SoB case because the official cases don't go that small, but I've followed the same rules that were used to generate the other golden rectangle cases.

I redesigned the board largely for use with my Loki board, but it should make a good (and cheap!) OSHW substitute for the Miniprog3 for anyone who's using a device with 5v debug power or no debug power.

[raob]

@nickjohnson, I am new to PSoC. I have a PSoC 3 Custom development Board that I used long back. Now, I get an error that says"Flash Row is not valid for the selected array" when I try to bootload my application via USB. I read in the AN68272 document that the Bootloader must be reprogrammed using JTAG/SWD.

My question is can I use any JTAG/SWD programmer or should I use Cypress chip based programmer only ?

[nickjohnson]

@nickjohnson, I am new to PSoC. I have a PSoC 3 Custom development Board that I used long back. Now, I get an error that says"Flash Row is not valid for the selected array" when I try to bootload my application via USB. I read in the AN68272 document that the Bootloader must be reprogrammed using JTAG/SWD.

My question is can I use any JTAG/SWD programmer or should I use Cypress chip based programmer only ?

I don't have any experience with reprogramming PSoC chips with third-party JTAG or SWD programmers, but it's probably worth a try. A board like this one will definitely work.

[raob]

@nickjohnson, Thanks for the reply. I will definitely try. Just one more query. My PSoC 3 development board with JTAG interface has TMS and TDO connected to Vddd via 4.7k resistor.

JTAGinterface.png (8.8 KiB) Viewed 1582 times

I have seen other development which do not have anything like this. Does it mean that I won't be able to interface JTAG?

[nickjohnson]

@nickjohnson, Thanks for the reply. I will definitely try. Just one more query. My PSoC 3 development board with JTAG interface has TMS and TDO connected to Vddd via 4.7k resistor.

JTAGinterface.png

I have seen other development which do not have anything like this. Does it mean that I won't be able to interface JTAG?

I'm not sure why that would be the case. It shouldn't prevent the board from working fine with a standard programmer.

[raob]

@nickjohnson, Thanks.

[Zeta]

Hello zeta,
The first thing that I would like to know is the difference between EZ USB FX1 and JTAG/SWD interface, If yes, What are the differences?

Hi raob, The FX1 based programmer supports SWD interface. You can use it to falsh the firmware into your dev kit, you just need the correct connector for your dev kit. the correct Pin mapping for a standard JTAG conector can be found here http://www.cypress.com/?id=4&rID=38577

My question is can I use any JTAG/SWD programmer or should I use Cypress chip based programmer only ?

PSOC3 has some strict timing requirements for programming so most third party JTAG programmers don't work with it (like the bus pirate) but you won't lose anything if you try anyways.

You can find qualified programmers here http://www.cypress.com/?rID=2543

[Zeta]

I've just finished designing a programmer based off this design.



Changes I've made:

• Converted to SMD parts instead of thru-hole ones
• Micro USB socket instead of USB A plug
• 10 pin 0.05" Miniprog 3 connector
• Removed reset button
• Refactored to (sort-of) SoB case size 4025
• Device power is now controlled from USB VCC instead of the 3.3v regulator
• Added a footprint for an EEPROM so custom VID/PID can be stored.

I say 'sort of' SoB case because the official cases don't go that small, but I've followed the same rules that were used to generate the other golden rectangle cases.

I redesigned the board largely for use with my Loki board, but it should make a good (and cheap!) OSHW substitute for the Miniprog3 for anyone who's using a device with 5v debug power or no debug power.

Nice work

Althouth, Vtarg in miniprog conector is suposed to be connected to VDDIO (for the io bank that contains the JTAG pins) in the target board so if you put there 5v directly from VUSB to Vtarg your 3.3v SWDIO and SWDCLK might be unreliable in presense of moderate noise. Please let me know how it turns out.

I have an unfinished design with a logic level translator. I might start working on it again, since I just blew my miniprog3 :'-)

[nickjohnson]

I've just finished designing a programmer based off this design.



Changes I've made:

• Converted to SMD parts instead of thru-hole ones
• Micro USB socket instead of USB A plug
• 10 pin 0.05" Miniprog 3 connector
• Removed reset button
• Refactored to (sort-of) SoB case size 4025
• Device power is now controlled from USB VCC instead of the 3.3v regulator
• Added a footprint for an EEPROM so custom VID/PID can be stored.

I say 'sort of' SoB case because the official cases don't go that small, but I've followed the same rules that were used to generate the other golden rectangle cases.

I redesigned the board largely for use with my Loki board, but it should make a good (and cheap!) OSHW substitute for the Miniprog3 for anyone who's using a device with 5v debug power or no debug power.

Nice work

Althouth, Vtarg in miniprog conector is suposed to be connected to VDDIO (for the io bank that contains the JTAG pins) in the target board so if you put there 5v directly from VUSB to Vtarg your 3.3v SWDIO and SWDCLK might be unreliable in presense of moderate noise. Please let me know how it turns out.

I have an unfinished design with a logic level translator. I might start working on it again, since I just blew my miniprog3 :'-)

In my case, the Loki has an onboard 3.3v regulator, and the latest revision of it connects the debug header's VTARG to the 5v rail - so the debugger needs to supply 5v, rather than 3.3. I did this because I think it should be more reliable: it doesn't result in reverse-biasing the 3.3v regulator, and it means any attached expansion boards that use 5v will see a correct voltage.

If you're looking at doing a level shifter, selectable voltages for vtarg would probably be useful too.

How did you blow up your miniprog3?