The FT2232 has what they call the MPSSE engine which acts as a JTAG programmer, the FT232RL doesn't have that feature. The FT2232 would be able to program any JTAG device, the challenge is to find a project that already supports the device in question so you don't have to write your own program. URJTAG might support the 28pin AVR chip.
We can use a cheaper USB chip if we include SPI Flash with the design. We would just have to include a JTAG header and use a JTAG programmer to put the SUMP design into the flash before it is sold.
There's been a strong push for USB 2.0 support. I'm not sold on it being a requirement because the SUMP client is UART only, someone would have to add support for whatever proprietary USB device driver, just having a USB 2.0 connection won't make 115200bps go any faster.
However, I thought you used the FTDI chip in bitbang mode to JTAG program. I thought all the FTDI-based JTAG programmers did that. Now I see they use the MPSSE, and it's only on the 2232 (H is the USB 2.0 version). I googled around but couldn't find a simple 232R bitbang JTAG programmer to cannibalize, which seems the ideal option to me.
The 'H' (USB 2.0) version of the 2232 has two MPSSEs, so we could route 2 extra wires for the UART and add high-speed SPI data dumps via USB2.0 in a firmware update (assuming someone made the SUMP client compatible as well). Probably don't actually need two units for this, but maybe it's easier to route.
The 2232H looks like a pain to implement. It requires a 3.3volt supply, crystal, and the IO is 3.3volt only (though 5volt tolerant), supply pins everywhere. It's also a 64pin chip, which is a bit more expensive to place and QC. It may also require an external EEPROM for ASYNC uart mode (page 42 of the datasheet), and that will have to be programmed too, but page 20 says it defaults to dual async serial without.
I started preparing a partlist for Seeed based on a 2232H device, but I stopped when I saw all the support parts for the FT2232H. After looking at designs and datasheets, I think we should hash out a few things so we don't have to get an additional quote later.
Maybe we should consider a cheap microcontroller with USB and implement the Xilinx XSFV programmer in the micro for updates? I've implemented an XSFV programmer port for PIC, and I have a Spartan-3 dev-board, I'll test them together. We could make an SPI interface to the FPGA instead of UART, that leaves room for faster IO with updated clients (and might be easier to implement on the FPGA). The whole thing could be upgradable; USB-> bootloader->PIC, USB->XSFV player->FPGA.
USB 2.0 would be sexy, but a full-speed USB PIC has the potential for 12Mbps (I think). If the interface to the FPGA was SPI, then even an emulated serial port interface could be really really fast. A firmware update could implement a different interface (Full-speed, HID, etc) if anyone ever developed a client to support it.
I see few possible design, then:
2232H - USB2.0 connection with on-chip programmer, potential for SPI FPGA data interface via MPSSE2.
232R - USB connection with FPGA bootloader factory programmed, maybe route the IO pins for JTAG programming and hope someone is interested. UART connection to FPGA data.
uC - USB microcontroller with XSFV player for FPGA updates, and bootloader for microcontroller updates. SPI connection to FPGA data. (I'd start looking at some of the '18fxxjxx' USB pics, they're 3volts and much cheaper than the 5volt parts)