Logic Shrimp variation

The Logic Pirate is a medium speed, low-cost logic analyzer with a USB interface. It can capture up to 256K samples at 20MHz (80MHz with overclock), and is compatible with SUMP logic analyzer client. Get one for $30 at Seeed Studio. Logic Shrimp support available here.

Logic Shrimp variation

Postby jaromir » Tue Jun 07, 2011 5:01 am

I've made variation of logicshrimp, using only through-hope components found in my junk box.
More details and pictures can be found here ****
There is no schematics drawn, I built it just using datasheets and original schematics - and I'm too lazy to draw it once it is working.
Device is really great, I got it working flawlessly in two or three hours. OSL software is quite good. Cost of all components was under 10EUR.


***hmm, forum system doesn't allow to post me url of my flickr photoset. It thinks I am spammer :-)
my personal webpage - http://jaromir.xf.cz/ Update 05.06, project PIC500
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Re: Logic Shrimp variation

Postby ian » Tue Jun 07, 2011 5:05 am

Great project, this is also on my to-do list.

Sorry about the spam filter. You can exclude http://www. and .com and it should work. You can also shoot it through the contact form and I'll post it here and on the blog.
http://dangerousprototypes.com/contact/
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Re: Logic Shrimp variation

Postby ian » Tue Jun 07, 2011 5:24 am

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Re: Logic Shrimp variation

Postby ian » Tue Jun 07, 2011 5:26 am

Did you have to recompile for the 26J50?
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Re: Logic Shrimp variation

Postby arhi » Tue Jun 07, 2011 5:43 am

I assume the crystal + 74hc04 are replacing the oscillator, nice .. but I think you reeeeeeeally need a decoupling cap on all the sram chips and on the input buffer
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Re: Logic Shrimp variation

Postby jaromir » Tue Jun 07, 2011 6:09 am

ian wrote:Did you have to recompile for the 26J50?


I tried to, but after struggling with include files and successful build it did not work correctly. I believe there was mismatch in descriptors/endpoints assignment. I understand problems with USB stack distribution, but document about how to adapt it for logic shrimp would be nice.
As a quick and dirty solution I FLASHed image (app + bootloader) for PIC18F24J50 into 18F26J50 and it seems to work. I didn't check bootloader functionality, however.
my personal webpage - http://jaromir.xf.cz/ Update 05.06, project PIC500
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Re: Logic Shrimp variation

Postby jaromir » Tue Jun 07, 2011 6:14 am

arhi wrote:I assume the crystal + 74hc04 are replacing the oscillator, nice .. but I think you reeeeeeeally need a decoupling cap on all the sram chips and on the input buffer


There are 100nF decoupling caps under IC sockets, as well as 22pF (for crystal) and 10uF (Vcap pin) caps under PIC socket. Seven pieces of 100nF caps, but only one visible.
74HC04 isn't oscillator replacement. I enabled HS oscillator in PIC and HC04 is just a buffer to take signal from OSC2 pin.
my personal webpage - http://jaromir.xf.cz/ Update 05.06, project PIC500
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Re: Logic Shrimp variation

Postby ian » Tue Jun 07, 2011 6:16 am

I didn't make any other changes than described in the source and in the wiki about the stack:
http://dangerousprototypes.com/docs/Com ... C_projects
Other than that I just include the files and compile. We use an assigned USB VID/PID, but that is just a minor change in the descriptor and you need not change from the default.
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Re: Logic Shrimp variation

Postby jaromir » Tue Jun 07, 2011 6:33 am

I don't know what wrong I've done. My device enumerated as CDC, created virtual port, but it never received any data. I tried to send SUMP commands manually from terminal, but I wasn't successful. I used TeraTerm and Tx indicator was permanently in "active" state, so it seems like data was never really sent.

I tried to build my own CDC device on the same board and it works as expected.
In fact, I have quite a bit of experience with Microchip USB stack, but I was lazy to debug it, as there was complete solution on hand :-)
my personal webpage - http://jaromir.xf.cz/ Update 05.06, project PIC500
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Re: Logic Shrimp variation

Postby ian » Tue Jun 07, 2011 6:41 am

Hum, maybe they've updated again and broken some compatibility in our config files. Thanks for the followup, I'll check into it.
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Re: Logic Shrimp variation

Postby arhi » Tue Jun 07, 2011 11:31 am

ian wrote:Hum, maybe they've updated again and broken some compatibility in our config files. Thanks for the followup, I'll check into it.


That is a huge pain in the .. every time they upgrade MAL they break some applications :(

jaromir wrote:There are 100nF decoupling caps under IC sockets, as well as 22pF (for crystal) and 10uF (Vcap pin) caps under PIC socket. Seven pieces of 100nF caps, but only one visible.


ah great :) I love to put them inside the socket too :)

jaromir wrote:74HC04 isn't oscillator replacement. I enabled HS oscillator in PIC and HC04 is just a buffer to take signal from OSC2 pin.


You are using HS oscilator on the PIC and using clk out to drive the hc04 .. I understood you made oscillator with crystal and hc04 and then feed the signal to the both pic and memory
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Re: Logic Shrimp variation

Postby arakis » Wed Jun 08, 2011 6:06 am

hi would it be posible to use different spi mem chips then the ones in the desingn, atmel's AT25DF041A has 4 Mbits adn a 70MHZ clk, and i think it is pin compatable, how dificult would be to change the code to take 4M of data insted 256k
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Re: Logic Shrimp variation

Postby ian » Wed Jun 08, 2011 6:19 am

That looks like a flash chip, so it would have limited write cycles in theory.

You'd need bigger timers for this I think. The 16bit timers in the PIC use a /4 to get the same count as in the SRAM. I guess you could use a bigger divider, but then you start to get strange start and stop points. There's some info on the timer setup in the design overview (especially the last paragraph of the section):
http://dangerousprototypes.com/docs/Log ... ock_system
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Re: Logic Shrimp variation

Postby arakis » Wed Jun 08, 2011 6:43 am

thatnks for a quick reply,
about the counter, couldnt a 8 bit timer0 be used to drive the Timer one thus giving 24 bit adressing or 16Mb per chanel
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Re: Logic Shrimp variation

Postby arakis » Wed Jun 08, 2011 7:05 am

*offtopic, could a paralell rom chip be used to buffer data.
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