MSP430 Launchpad Logic Analyzer

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MSP430 Launchpad Logic Analyzer

Postby oPossum » Wed Jul 04, 2012 6:22 pm

This is a logic analyzer add-on for the TI MSP430 Launchpad. It is inspired by the Logic Shrimp - you could say it is a rip off the design - that would be quite fair.

The prototype is built on perf board with soldered point to point wiring.
protoassembly.jpg

The first test was done with a 74HC4040 counter clocked by a 10 MHz canned oscillator.

The FTDI BOB shown is optional. The VCP on the launchpad can be used but it is limited to 9600 bps, so rather slow.
counter_hw.jpg

The max sample rate is 16 Msps. The top trace is 5 MHz and the jitter is clearly visible.

A custom config file for OLS was made to support the specific feature set of the hardware and current firmware.
counter_cap.png

There are a few differences in the design compared to the Logic Shrimp.

The SPI RAM chips have the SI and SO lines tied together. This reduces the pin count needed on the microcontroller. The SO line is tristate whenever the data is being sent so there is no bus conflict. The firmware must be careful to properly track the read/write state and set it's port direction appropriately.

The MSP430 can output it's internal clock on P1.4, so this is used to clock the SPI RAM during acquisition. This feature eliminates the need for a tristate buffer between the oscillator and RAM CLK line. The internal oscillator of the MSP430 is used so there is no osc module or xtal needed. The sample rate can be adjusted by changing the internal clock frequency and clock dividers. The current firmware uses the precalibrated 1 and 16 MHz clock frequencies and dividers of 1, 2, 4 and 8 for sample rates of 16, 8, 4, 2, 1, 0.5, 0.25, 0.125 Msps. The internal osc of the MSP430 is very versatile so more sample rates can be added in future firmware.

There is an optional phase shift R/C on the latch clock to ensure data hold time for the RAM. This is not on the prototype and so far it seems to work fine without it.
schematic.png

A PCB has been designed, but none made yet. It is 50 mm x 50 mm for low cost.
pcb.png

Firmware and Eagle CAD files
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Re: MSP430 Launchpad Logic Analyzer

Postby ian » Tue Jul 10, 2012 5:27 am

I really like this and I'm glad you shared it. This is such a cool logic analyzer topology, and it's easy to bolt it onto anything.

Interesting use of the muxxed MOSI and MISO lines. Do you have to do SPI in software to get that exact control over the pin state?

Do you know the people at MSP43oh forum? They would probably love this. I'd also be willing to have your PCBs made if I can put 5 in the free PCB drawer.
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Re: MSP430 Launchpad Logic Analyzer

Postby oPossum » Wed Jul 11, 2012 6:59 pm

I haven't really looked at using hardware SPI, but I think there would be a brief time where both the microcontroller and SPI peripheral are configured for output and potentially fighting each other. The software SPI does a very careful transition to prevent this. Not all SPI chips can have their serial in/out lines tied together. Some simply tristate the output when CS is inactive. The 23K256 tristate the SO line whenever they are receiving a command or data so it works for them.

I have posted a few small projects at the 43oh forums. This DCO calibration method will probably be used in a future version of the LogicBoost firmware to allow for more fine grained control of the sample rate.

Please add some LogicBoost boards to the free PCB drawer. It would be great to get some more of these built up and see how it well it works for others.
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Re: MSP430 Launchpad Logic Analyzer

Postby oPossum » Mon Aug 06, 2012 5:35 am

Got some boards from seeed. Made a mistake on the silk - used proportional font instead of vector so the text is too big. Not sure how I missed this in gerber preview. I forget to make vector the default last time I installed Eagle.

Also got some of my Lauchpad Mini boards made. It is a 50x50 mm board that gives the second chip that comes with the Launchpad a home. It has mounting holes that the Launchpad lacks, and versatile power options. Mostly thru-hole components so anyone can build it.
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Re: MSP430 Launchpad Logic Analyzer

Postby 6u5t4v0 » Wed Aug 15, 2012 12:29 am

Great Opossum!

is it working good?

Do you intend to sell one of these boards?
im really interested to get one of these shields, im thinking about make one
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Re: MSP430 Launchpad Logic Analyzer

Postby phalox » Wed Aug 15, 2012 2:34 pm

I'd like to buy a PCB too. I think I have the components already, but I'm not really feeling up to wiring all of them by hand :-)
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Re: MSP430 Launchpad Logic Analyzer

Postby schazamp » Fri Aug 17, 2012 8:33 am

I, too would be interested in buying a PCB, if you have any spares. Do you accept paypal?
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Re: MSP430 Launchpad Logic Analyzer

Postby oPossum » Wed Aug 22, 2012 9:10 am

It seems to be working well. The only problem I know of is that the Logic Sniffer software has a problem using the serial port on Linux. I am using it on Windows 7-64 and it works well.

I have a few PCB for sale here. Please post any questions about the sale in that thread or PM me.
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Re: MSP430 Launchpad Logic Analyzer

Postby jawi » Thu Aug 23, 2012 1:37 pm

@oPossum: what problem do you experience with my client on Linux?
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Re: MSP430 Launchpad Logic Analyzer

Postby oPossum » Fri Aug 24, 2012 11:08 am

The problem was reported by two people who tried the use the UART on the launchpad. I think the lack of a 9600 baud rate is the issue. On Windows it will use the last valid baud rate when an unsupported baud rate is specified, but that doesn't seem to work on Linux. Unfortunately the highest baud rate supported by the launchpad is 9600. I think using an FTDI USB to serial adapter would allow it to work.

It would be great to be able to specify a list of baud rates in the config file. The ideal baud rates for this would be 9600, 38400, 62500, 125k, 250k, 500k, and 1M.
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Re: MSP430 Launchpad Logic Analyzer

Postby jawi » Sat Sep 08, 2012 4:47 am

(I'm back from my holiday, so sorry about the late reply)

I see your point. I'll add some additional baud rates to the OLS device, or make it even editable, just like in the UART decoder.
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Re: MSP430 Launchpad Logic Analyzer

Postby schazamp » Thu Oct 18, 2012 4:10 pm

This is a great little logic analyzer. I built one of these the other day, on perfboard. I ran into a couple of snags, so I thought I'd post them up here, in case anyone else encounters them.
IMG_3389.JPG
This was a challenging perf board build, if I were to do it again, I would have given myself some more space between components.

IMG_3386.JPG
Here you can see it analyzing my XC95144 breakout board, which had a clock signal divided over and over again.


First, I could not figure out how to build the main.c using the mingw msp430-gcc compiler -- it kept complaining about undefined P2IN and P2IE symbols. Using the TI CCS (a gig download, which I was trying to avoid), it compiled just fine.

Second, it took me several tries to get the OLS client (version 0.9.4) to recognize the analyzer. I tried using an FTDI adapter, and I eventually found that I could set the bit rate to 38400 (from 9600 in the original source), which is both supported by the client and fits within the configuration variable constraints.

Third, in trying to solve problem 2, I tried using the latest OLS client, version 0.9.6, but the custom configuration files showed up as "<unknown>" in the analyzer list, and I was not able to select it.

Once I got all that sorted out, I had it kind of working, but channels 2,3, and 4 were not. I tracked it down to a bad solder joint on the CS line to those RAM chips, once I re-did the joint, it worked like a charm.

IMG_3388.JPG
The bottom side, what a mess. I eventually trimmed off the excess perf board and excess spacer headers.


I also set it up to take power from the FTDI connector (which is running at 3.3V, with 3.3V IO, and providing 3.3V power to the shield and launchpad. I removed all the jumpers between the launch pad programming board and the dev board itself.

IMG_3387.JPG
The spacers between.


Finally, because of all the wiring I had to do on the bottom of the shield, with the height of the MCU in the socket, I couldn't get a good connection from all of the pins at once, so I had to add a layer of jumpers to give it some space. I still need to get in there and Dremel off all the extra stuff. But all 6 channels work now, and with a small enough sample size, downloading at 38400 bps isn't too bad.

And now that I have a workable logic analyzer, I can proceed with my 7400 contest project, so I don't have to keep reprogramming my BP between the XSVF player firmware and the standard firmware (with logic analyzer support).
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Re: MSP430 Launchpad Logic Analyzer

Postby t0mpr1c3 » Fri Oct 19, 2012 9:35 am

It looks like a great little tool. Although my soldering being what it is, I bought the PCB. :)
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Re: MSP430 Launchpad Logic Analyzer

Postby Markus Gritsch » Thu Oct 25, 2012 11:00 am

schazamp wrote:I tried using the latest OLS client, version 0.9.6, but the custom configuration files showed up as "<unknown>" in the analyzer list, and I was not able to select it.


You need to add something like
device.receive.timeout = 100
to the config files.

Please find the updated profiles attached.
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Re: MSP430 Launchpad Logic Analyzer

Postby Markus Gritsch » Fri Oct 26, 2012 3:02 pm

schazamp wrote:I tried using an FTDI adapter, and I eventually found that I could set the bit rate to 38400 (from 9600 in the original source), which is both supported by the client and fits within the configuration variable constraints.


You are only limited to 38400 baud because the bps variable is defined as a 16 bit int. I changed the variable to unsigned long and it works fine up to the maximum baud rate, the MSP430 can handle according to the datasheet (slau144h.pdf page 430 at the bottom - page 430, what a nice coincidence :)

Here is my modified line 27 from main.c:
static const unsigned long bps = 460800;

P.S.: I'm looking forward to build the logic boost, since the internal configuration is limited to a mere 384 Samples @ 2 MSamples/s.
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