Bus Blaster V3 TDO stuck at 1 Continued...

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Bus Blaster V3 TDO stuck at 1 Continued...

Postby tormod » Wed Jan 01, 2014 11:34 am

I finally got some time to look at this issue again.

In order to verify my setup I invested in a Flyswatter.

. Linux 64 bit, 12.04 LTS
. Latest SVN of urjtag
. Make sure usbserial.ko will not load.
. Configured urjtag: ./configure --without-ftd2xx
. Connected to my target using the Flyswatter all good, chain detected.

Note:
I could not get the urjtag to properly detect my target if I used the official ftd2xx (1.2) library.

Started investigating the Bus Blaster again.

. Compiled some libftdi examples, verified that I could read out the correct chip type on the BB V3
. Created a cable suitable for my target
. Connected all together still get:

> cable ft2232 pid=0x6010 vid=0x403 interface=0
> detect
warning: TDO seems to be stuck at 1

. Installed the SVF file (bbv3.zip) that Will posted in the previous thread, same result.

Questions:
. Is the BB V3 compatible with the V2 ?
. What is the correct bitstream to use for the V3 board ?
. If the BB is JTAGKey or KT-Link compatible why does it have to be detected as a generic ft2232 ?
. When will you create a proper package for BB V3 like the one which exists for V2 ?
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Re: Bus Blaster V3 TDO stuck at 1 Continued...

Postby joefitz » Fri Jan 17, 2014 3:11 am

Saw your post a couple days ago while i was encountering a similar problem, i just got it working.

Setup:
BBv3c
Ubuntu 12.04.3 64bit
libftdi (sudo apt-get install libftdi1)
urJtag v0.10 (sudo apt-get install urjtag)

Programming the buffer logic went fine for me. Trying to program anything else got TDO stuck at errors.

I tried the svf posted here and any others i was able to find, nothing worked. Downloaded the source and built my own svf, still no. Started a xilinx project from scratch and copied pieces from the verilog project, still nothing different.

shorting TDO to vcc/ground with a wire got TDO stuck at 1/0, so i knew it was sort of working, but i wasn't seeing anything happen on the output signals. Modified the rtl to map FT_JTAG_OE to the LED and saw it was always high.

So, i removed the output enable logic, wrote the svf, and now my bus blaster works great with urjtag. I don't pretend to know how everything is supposed to work (particularly the software) so someone please let me know if i did something i shouldn't have by removing the output enable.

Otherwise, svf attached. good luck. Log shows writing my buffer logic then writing one of the tutorial files to my cpld dev board (er, well, actually to a xbox360 glitch chip, AKA my $3 cpld development board.)
Code: Select all
jtag> cable ft2232 pid=0x6010 vid=0x0403 interface=1
jtag> detect
IR length: 8
Chain length: 1
Device Id: 00000110111000011100000010010011 (0x06E1C093)
  Manufacturer: Xilinx (0x093)
  Part(0):      xc2c32a-vq44 (0x6E1C)
  Stepping:     0
  Filename:     /usr/share/urjtag/xilinx/xc2c32a-vq44/xc2c32a-vq44
jtag> svf BBv3-JTAGkey-fixed.svf stop
jtag> cable ft2232 pid=0x6010 vid=0x0403 interface=0
Connected to libftdi driver.
jtag> detect
IR length: 8
Chain length: 1
Device Id: 00000110111001011110000010010011 (0x06E5E093)
  Manufacturer: Xilinx (0x093)
  Part(0):      XC2C64-VQ44 (0x6E5E)
  Stepping:     0
  Filename:     /usr/share/urjtag/xilinx/xc2c64a-vq44/xc2c64a-vq44
jtag> svf Verilog-CPLDIntro2Ledbutton.svf stop
jtag>
Last edited by joefitz on Sun Jan 19, 2014 1:04 am, edited 1 time in total.
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Re: Bus Blaster V3 TDO stuck at 1 Continued...

Postby marcelo » Sat Jan 18, 2014 2:30 pm

Hi Joe,

You seem to have solved the same problem I am having on my 4.1a ... is there any chance you can share the before/after files with me so I can try the same change on my 4.1a code?
I have been trying for support here so far with no results, so maybe your solution will drag me out of the swamp.

Thanks,
Marcelo.
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Re: Bus Blaster V3 TDO stuck at 1 Continued...

Postby tormod » Sat Jan 18, 2014 4:05 pm

joefitz wrote:Saw your post a couple days ago while i was encountering a similar problem, i just got it working.


Thank you! I will try it out as soon as I make a new cable. The one I used has become a flyswatter!
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Re: Bus Blaster V3 TDO stuck at 1 Continued...

Postby joefitz » Sun Jan 19, 2014 1:03 am

tormod wrote:Thank you! I will try it out as soon as I make a new cable. The one I used has become a flyswatter!


Before you do... i think i figured it all out for real...

My problem had to do my urjtag commands:
Code: Select all
jtag> cable ft2232 pid=0x6010 vid=0x0403 interface=0

tells urjtag to use a generic ft2232 wired straight-through to a jtag port. The pid/vid is necessary to tell it which device. urjtag doesn't properly set the jtagkey compatible enables and so tms/tck don't make it through.
Code: Select all
jtag> cable jtagkey pid=0x6010 vid=0x0403 interface=0

tells it to use the jtagkey driver, which will properly toggle the enables and work properly. pid/vid are required since they do not match the jtagkey pid/vid

So, using the file ian posted here: viewtopic.php?f=37&t=3993
my commands are:
Code: Select all
jtag>
jtag>    //write ian's buffer logic to the cpld using 2232 driver to interface 1
jtag>
jtag> cable ft2232 pid=0x6010 vid=0x0403 interface=1
Connected to libftdi driver.
jtag> detect
IR length: 8
Chain length: 1
Device Id: 00000110111000011100000010010011 (0x06E1C093)
  Manufacturer: Xilinx (0x093)
  Part(0):      xc2c32a-vq44 (0x6E1C)
  Stepping:     0
  Filename:     /usr/share/urjtag/xilinx/xc2c32a-vq44/xc2c32a-vq44
jtag> svf BBV3-JTAGkey-selftest-v1.1.svf stop progress
detail: Parsing    660/664 ( 99%)detail:
detail: Scanned device output matched expected TDO values.
jtag>
jtag>     ///write your target with the jtagkey driver to interface 0
jtag>
jtag> cable jtagkey pid=0x6010 vid=0x0403 interface=0
Connected to libftdi driver.
jtag> detect
IR length: 8
Chain length: 1
Device Id: 00000110111001011110000010010011 (0x06E5E093)
  Manufacturer: Xilinx (0x093)
  Part(0):      XC2C64-VQ44 (0x6E5E)
  Stepping:     0
  Filename:     /usr/share/urjtag/xilinx/xc2c64a-vq44/xc2c64a-vq44
jtag> svf Verilog-CPLDIntro2Ledbutton.svf stop progress


So, i'll delete my file above and post several files here, including
bbv3-passthrough.svf that will allow you to use it as a simple ftdi cable, a selftest-free bbv3-Jtagkey.svf tested with urjtag, and xilinx files to build them
-joe
Attachments
bbv3.zip
bus blaster v3 passthrough and jtagkey svf files and source.
(67.81 KiB) Downloaded 386 times
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Re: Bus Blaster V3 TDO stuck at 1 Continued...

Postby Torrentula » Sun Jan 19, 2014 3:31 am

Hi Joe!

I just wanted to chime in on this and first of all thank you for figuring out the UrJTAG driver problem (jtagkey instead of ft2232) and then of course providing the modified JTAGkey buffer logic.

It seems like I got lucky to download and reupload the modified bitstream to my server as it does have some uses.
I originally got my BB in order to program a Lattice MachXO CPLD I've got on a dev board. As it turns out the dev board also had an FT2232 on it before I accidentally made it release the magic smoke (oops).

Long story short, the modified buffer logic makes the BB work with the Lattice Diamond design software programming solution, i.e. you can program Lattice CPLDs directly from Lattice's official software.

I presume I could've just used the unbuffered 3.3V JTAG connector on the side instead of reprogramming the buffer? Anyway with the modified buffer logic I could also have a 1.8V JTAG interface working with the Lattice software directly.

Unfortunately I can't link to my blog post as it complains about me as a new user being a spammer.

EDIT: I just saw that you've uploaded a new bundle with the bbv3-passthrough.svf which also works together with the Lattice design tools.
I am already linking to the thread, may I reupload that .zip to my server so that I can link to a known good version (preventing dead link problem)? Of course I will attribute you for making those changes ;)

Cheers,
Elia
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Re: Bus Blaster V3 TDO stuck at 1 Continued...

Postby joefitz » Sun Jan 19, 2014 5:30 pm

Torrentula wrote:It seems like I got lucky to download and reupload the modified bitstream to my server as it does have some uses.

i took it down just cause the name was misleading - it said jtagkey when it most certainly wasn't. the bbv3-passthrough.svf should be identical (let me know if you have trouble with it). Glad it's useful!!

Torrentula wrote:I am already linking to the thread, may I reupload that .zip to my server so that I can link to a known good version (preventing dead link problem)? Of course I will attribute you for making those changes ;)

Post away, i copied the license file from the svn into the zip since everything is derived from that code to begin with.

-joe
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Re: Bus Blaster V3 TDO stuck at 1 Continued...

Postby tormod » Mon Jan 20, 2014 2:21 pm

Hi joefitz,

I assembled a makeshift cable and tried it out. Everything is working 100%, things are a bit faster than usual but I suppose I will have to get used to that :D

Thank you very much for getting to the bottom of this, it is very much appreciated!
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Re: Bus Blaster V3 TDO stuck at 1 Continued...

Postby thanratty » Sat Mar 11, 2017 1:27 am

Many thanks to joefitz for this fix for a stuck TDO.
I had exactly the same symptoms as everyone else: self-test passed but TDO stuck.
You're a life saver with this.
Shame the DP staff don't seem to support their products much.

The GitHub repository for BusBlaster is confusing.
Which is the right repository for the xilinx ISE project:

bus_Blaster/buffer_logic/JTAGkey-VHDL
*or*
bus_Blaster/buffer_logic/JTAGkey

There are also SVF files all over the place. Confusion abounds.

Thanks again.
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