dogsbody wrote:The demon core didn't just happen all in one go. Originally I just translated OLS to verilog & fixed a few timing problems. There were more than one "huh?" moments.
Later I connected the thoughts of "HP 16550" and LUT cells and felt the light bulb go on. There was a lot of rewriting after that point, but vestiges of the old are still there.
In short, no particular reason. If you feel refactoring would make things easier to update/understand go for it! :-)
Heheh, understood. It´s more like a different structure to begin with would have helped (me). But my attempt at doing 2 things all in 1 go (impatience and all that) failed horribly. So for next time when I get around to it (hopefully next week) the plan is to take a fresh repo checkout and just add a lame spi/uart bridge. Less optimal, but more transparent.
I doubt the presence of decoding in one file or another is the problem though. The UART code was very broken in the original OLS vhdl I translated. They had moved onto SPI by that point. Might explain a thing or two?
Oh no doubt the problem is some mistake I made, no mysteries there. :P It was more like that the current structure didn´t really help...
I'd suggest setting a simulation. Send in some data, see what the decoder is capturing. I used Icarus verilog on my home machine, which is free & includes the GTK waveform viewer.
Yeah, I actually did a simulation after fixing a few synth/sim mismatches. The simulation was pretty basic, but the results all looked okay. Right states in the FSM, right response on the UART. So I optimistically flashed that bit file, but no luck with the client. And then the chirp chirp birds outside notified me it was THAT LATE, so zzzZZZzzz. And no fpga tinkering events since then.
Anyways, the plan now is to keep everything as is and logic hot glue said spi/uart bridge on it in a big ugly blob. Then check with testbench and client. If that works ... make simple tool to configure some triggers. If that works ... refactor as I tried and failed right now.
... or something.