SPI Signal, long cable and some questions

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SPI Signal, long cable and some questions

Postby michu » Thu Mar 15, 2012 6:56 am

Hey guys

I work on a led project and i'm really stuck! The main issue is, that i use a spi signal over a long distance. I'm not a electrical engineer an that's why I'm asking the community for some hints. To get help, I wrote my problem down as detailed as possible:

http://neophob.com/2012/03/lpd6803-spi- ... -distance/

It would be great if someone could take a look at this topic and give me some feedback, concreate to those questions:

-what kind of Imped­ance resistor (between gnd and clk) would you use?
-what kind of capacitor the clean out DC would you use?
-did I forget something important?
-other hints....


cheers
michu
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Re: SPI Signal, long cable and some questions

Postby Bertho » Thu Mar 15, 2012 2:33 pm

michu wrote:-what kind of Imped­ance resistor (between gnd and clk) would you use?
-what kind of capacitor the clean out DC would you use?
-did I forget something important?
-other hints....


Termination resistors need to be balanced between Vcc and GND. The classic TTL termination uses a 330R and a 220R resistor (330 to Vcc and 220 to ground) resulting in a 132R termination, assuming that the PSU impedance is low. If you only terminate to one side, then you may not be able to reach the required signal levels for '1' and '0'. Your termination resistors will depend on the line impedance you have. You can see reflections on a scope and you can tune the termination until the reflections are gone.

To drive long lines you need driver chips. Simple microcontroller outputs will normally not cut it. If you place many devices on a string or have long cables, then you need to ensure that the drivers can cope with the capacity of the line. The capacity is normally what limits the clock frequency. Rule of thumb says you have 100nF per km of cable (may be worse or better; see cable docs). It takes a lot of energy to drive capacitive loads. You also have signal degradation due to cable resistance. If you get to higher frequencies, you will encounter coaxial properties of the cabling and then you must ensure that the driving impedance matches the loading impedance and the terminating impedance (all must be equal).

Cutting in a string may introduce local reflections, which at high frequencies wreaks havoc. Intermediate taps should either be of infinite impedance (or close to invisible) or they must be terminated with the correct impedance. In the latter case you may need to have to add amplifiers to send the signal to the next stage.

The capacitance you need to add at the local tap's power depends on the load current variations and the cable resistance. The impedance of the power supply lines increases as you add more cable and that means you need to decrease the impedance locally with a polarized capacitor (order of 10..1000uF). The ESR of the capacitor should be low. How low depends on the load current changes. A second capacitor is a ceramic of ~100nF to short the high frequencies.

--edit--
You may also want to add a ferrite bead at each tap's power outtake. The effect of the inductance is that the rush-currents are damped and will not feed back as much. It also reduces the capacitance requirements at the local taps.

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Re: SPI Signal, long cable and some questions

Postby brian » Thu Mar 15, 2012 11:17 pm

I know you say you want to avoid it but a good transmission line is needed for a long distance at a high speed.

Even your single wires are transmission lines they are just to a ground very far away. They are very inductive this way and that means very very slow.

The wavelength is shorter than you state, as your wavelength is assuming a impedance of free space and not of the transmission line you have. 100 Ohm is typical for twisted pair. 75 or 50 for coax. This means longer wavelengths as frequency does not change but the velocity is less.

Terminating a poorly defined non-transmission line with any impedance is does make a lot of sense to me. (If they aren't twisted as the loop size changes the impedance will change).

Even without adding ground returns some progress can be made by twisting the 4 wires you have. I would twist the CLK line around GND and the data line around Vdd. Both GND and VDD are DC so from a transmission line viewpoint they are ground. If you have enough capacitance at each end it might be okay.

For reference, if you want long transmission the best thing would be differential buffers on each end, failing that single ended with ground returns for each line. Like a ribbon (IDE) cable or a CAT5 cable.
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Re: SPI Signal, long cable and some questions

Postby michu » Sat Apr 21, 2012 6:56 pm

Ugh already more than a month passed and I still try to solve this issue. A friend of mine had a similar issue, he use a "74AC245,Bidirectional Transceiver with 3-STATE Inputs/Outputs". He was kind enough and sent me his eagle design:

rev002.png


If I put this driver in the beginning of my installation, it works fine. But if I put this driver AFTER the first cable, it will not work anymore (too much noise):
signal.jpg

Output signal: yellow
Input Signal: Cyan (note the ripples, they get cutoff)

Maybe its due my used zener diode, a Diotec ZPY 5,6V 3W?

I can fix my signal when add a 1kOhm resistor between CLK and GND, this reduce the Vpp level from 6-7V down to 4-5V. however this does NOT work on the data line, why not?
And adding a 1kOhm resistor is unfortunately not THE solution, as the signal is very bad after 6 of 8 illuminated letters. thats why I want to regenerate the signal after 4 letters, thus improve the schema, any hints?

cheers and thanks
michu
Last edited by michu on Sun Apr 22, 2012 5:18 am, edited 1 time in total.
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Re: SPI Signal, long cable and some questions

Postby arhi » Sat Apr 21, 2012 8:02 pm

michu wrote:If I put this driver in the beginning of my installation, it works fine. But if I put this driver AFTER the first cable, it will not work anymore (too much noise)


line driver like 245, 540, 541... has to be put immediately after signal source, it's not a device you can put in the middle of the transmission lines.

If I understand your blog correctly, you get the first strip to work but second strip don't and between first and second strip is a lengthy cable just like between your mcu and first strip. What I think you should do is:

MCU -> LINE DRIVER -> CABLE -> LINE DRIVER -> STRIP1 -> LINE DRIVER -> CABLE -> LINE DRIVER -> STRIP2 -> LINE DRIVER -> CABLE -> LINE DRIVER -> STRIP3...

BTW, make sure how you connect line drivers. In the

MCU/PREV STRIP -> LINE DRIVER1 -> cable -> LINE DRIVER2 -> NEXT STRIP

LINE DRIVER1 need to connect A pins to the MCU/PREV STRIP and B pins to the cable, the LINE DRIVER2 need to have B pins to the cable and A pins to the next strip.

So line driver1 DIR pin is high, where at line driver2 DIR pin is LOW.

I never used this chips that are on the strip but you MIGHT get stuff working with only starting line driver so

MCU -> LINE DRIVER -> CABLE -> STRIP1 -> LINE DRIVER -> CABLE -> STRIP2 -> LINE DRIVER -> CABLE -> STRIP3...

Try that first
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Re: SPI Signal, long cable and some questions

Postby michu » Sun Apr 22, 2012 5:18 am

thanks Arhi for your reply

If I understand your blog correctly, you get the first strip to work but second strip don't and between first and second strip is a lengthy cable just like between your MCU and first strip.


correct and just a detail, I don't use strips but modules. anyway I got unit 2-6 working by adding a 1kOhm resistor between data and clock. however unit 7 and 8 are not really working correct (visible errors) thats why I wanted to add a line driver after 4 modules. according to the data-sheet my modules should regenerate the clk and datasignal after each pixel, I just discovered that the Vpp level get higher after each unit. so maybe you can help me answering some questions:
-why does a 1kOhm resistor between clk and gnd work, while a 1kOhm resistor between data and gnd does not work?
-what does the 1kOhm resistor do besides reducing the Vpp level?
-Are Zener diodes suitable in a 500kHz circuit or are there some special zener diodes available?

cheers
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Re: SPI Signal, long cable and some questions

Postby arhi » Sun Apr 22, 2012 9:31 am

what is the distance between the modules? These modules have a type of line driver in them and they resend the signal they get in. If you have 10 modules and you have issues with module 8 for e.g. then some or all of the following might be true
-distance from module 7 to module 8 is too great so that line driver inside the module cannot handle it (add line driver to the output of module 7)
-module 7 is faulty
- cable between module 7 an 8 is faulty (ringing, induction etc etc)

The 1k you are adding is terminating the line and probably eliminating some of the reflections you have there. The line output of that module should not need termination so I guess that either you have a faulty module or faulty cabling (wrong or too long cable). You should look at the signal with and without 1k resistor with a scope, hopefully something analog or something with high resolution, dso quad might not be able to be sufficient here (I have not manage to find it sufficient anywhere :( )...
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Re: SPI Signal, long cable and some questions

Postby Bertho » Sun Apr 22, 2012 6:09 pm

Wow, that is some noise you have there. Are you sure that you have a stable power supply to the drivers with proper decoupling? If the power supply is unstable, anything can happen. Take the scope-probe and measure the power supply directly on the buffer's power pins and see what that gives.

The driver circuit needs to be put at the cable start. The driver is supposed to deliver the energy onto the cable. From the scope picture it seems that you are loading a significant capacitive load.

On the input side (the end of the cable) you normally put a Schitt-trigger buffer. This is to reshape the flanks/edges of the signal, as logic circuits are very sensitive to rise-/fall-time of the input. The termination resistors (plural) are put at the input of the Schmitt-trigger in a voltage divider setup. The voltage divider should have a tap-voltage that is in the middle of the Vth/Vtl thresholds. The termination impedance (as seen on the line) is the the parallel combination of the resistors (it is seen as AC and you must therefore have a low-impedance (local) power supply). You can experiment with the termination values. F.ex. 330/220 resistors provide standard TTL compatible impedance of 132 Ohm (330 to Vcc and 220 to ground) and have a tap voltage of 2V at 5V power supply (which is about where the Schmitt-tigger has its threshold; see datasheet for details). The termination impedance should be compatible with the cable impedance, but 132 Ohm is a good start.

Daisy-chaining many of these buffers will give you a significant problem due to signal degradation. The high/low times will shift because the Tplh and Tphl (low-high and high-low propagation delays) are not equal. This is not only due to the buffer's Tplh and Tphl differences, but mainly because the cable is not symmetrically loaded. Therefore, you should use the schmitt-tigger approach, where the line is pre-set at the middle of the threshold voltages. That way you will have about the same time for low-to-high and high-to-low transitions.
You are running at a reasonable high frequency (>=200kHz from your image), so you are in serious trouble on the clock-line quite fast without reshaping symmetry.

If you use both MOSI and MISO in the daisy-chain, then you must route them in the same direction. This is because the clock will be phase shifted from input to output for each module and cable. If you are too far away in the chain, then you require two SPI interfaces on your CPU. One as master to provide the clock and one as slave to read the data. The slave's clock is the daisy-chained output. Your physical setup dictates how far you are pushing the envelope.

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Re: SPI Signal, long cable and some questions

Postby Bertho » Sun Apr 22, 2012 6:59 pm

I've attached an image of the line-driver and termination setup. It doesn't matter too much if you use inverting or non-inverting drivers. However, inverting types have traditionally been faster and with higher drive force, but that is probably not true anymore with the newer families. I've also seen alternating inverting/non-inverting setups which can compensate differences in the high-to-low vs low-to-high transitions a bit better.

If this does not work for you, then the alternative is to use balanced differential drivers (or even low-voltage balanced lines (like LVDS systems)). That means that each output-line has an inverting and non-inverting output, which are both used at the input to reshape the signal. However, in a balanced setup it becomes even more important to do termination at the correct impedance.

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Line driver and termination
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Re: SPI Signal, long cable and some questions

Postby arhi » Sun Apr 22, 2012 10:03 pm

Bertho wrote:On the input side (the end of the cable) you normally put a Schitt-trigger buffer.


Note that the chip is designed for working in a chain so inputs are already Schmidt's and output has a line driver emedded so each module acts as a repeater. You don't read anything from the modules so delay don't matter at all as long as the delay in the module is equal for both clock and data (and it should be).

I seen these modules in a strip 60m long and they work perfectly ... the distance between modules was short (<5cm) but it shows that delay ain't a problem ..
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Re: SPI Signal, long cable and some questions

Postby Bertho » Mon Apr 23, 2012 4:59 am

arhi wrote:I seen these modules in a strip 60m long and they work perfectly ... the distance between modules was short (<5cm) but it shows that delay ain't a problem ..


That should be no problem with 5cm. The capacitive loading is low. However, introducing 5m of cable can make a hell.

One simple test is to reduce the SPI clock to a low frequency (say 1..10kHz) and see if that helps. That would allow the signals to settle before being sampled.

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Re: SPI Signal, long cable and some questions

Postby michu » Mon Apr 23, 2012 5:31 am

Wow, thanks guys for your reply. My original idea was to use a schmitt trigger to reshape the flanks/edges of the signal. however a friend of mine had similar issues (with a ws2801 led driver while i use a lpd6803 led driver) and used severall bus drivers to fix his issues. as my electronical skills are quite limited i just tried his approach.

@arhi:
what is the distance between the modules?
the cable-length of each between each module (just to clear things up, one "module" has multiple led modules inside, between 10 and 20) is about 70cm, the cable is think (1,0mm²) but unshielded and not twistet. I try to switch modules and cables, and the result cannot be solved with logic (maybe I've got the tunnelblick already).
You should look at the signal with and without 1k resistor with a scope

I did that, what I saw is that the Vpp level decreases about 1-2V. And yes the Quad is definitive not a pro tool, however as a hobby product its quite okey...

@Bertho
Wow, that is some noise you have there.

I guess this sigal looks like this due slow flanks time, right?
Are you sure that you have a stable power supply

I use a 500W ATX Power supply, I used this one for another project (128 Led Modules) without issues. But there I didn't had long interconnecting cables. However I'll check the power supply with my scope and check if the 12V are pulsate, thanks for this hint!

The SPI clock is quite important yes, currently I use 0.5MHz. If I double that the error rate increases significant, I think I'll lower that to 250kHz.

So, my next concrete steps will be a) recheck the Power supply and b) lower SPI clock rate.

I'll post more questions after that..

thanks again for you help!
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Re: SPI Signal, long cable and some questions

Postby michu » Mon Apr 23, 2012 3:00 pm

as usual, the solution for a very strange issue is not that sexy, anyway I wrote down my lesions learned:

http://neophob.com/2012/04/long-distanc ... s-learned/
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Re: SPI Signal, long cable and some questions

Postby Bertho » Mon Apr 23, 2012 5:11 pm

michu wrote:
Wow, that is some noise you have there.

I guess this sigal looks like this due slow flanks time, right?


Not necessarily. The noise at the low level (cyan trace) is severe and you even have a glitch. That looks a bit like cross-talk between the clock and data lines. Definitely a sign of problems.

michu wrote:
Are you sure that you have a stable power supply

I use a 500W ATX Power supply, I used this one for another project (128 Led Modules) without issues. But there I didn't had long interconnecting cables. However I'll check the power supply with my scope and check if the 12V are pulsate, thanks for this hint!


The problem is not the master PSU, but what you have locally. You can have a lot of noise on the buffer's supply, even with a rock stable master supply. The cables are your worst enemy. That is why I wrote about the bypassing and the ferrite bead placed locally.

You should have the probe on the local Vcc/GND pins (at the 5V part) and see what it shows there (use only one scope trace with a floating setup). The buffers are sourcing and sinking a lot of current (probably > 100mA).

michu wrote:The SPI clock is quite important yes, currently I use 0.5MHz. If I double that the error rate increases significant, I think I'll lower that to 250kHz. So, my next concrete steps will be a) recheck the Power supply and b) lower SPI clock rate.


500kHz is a real pain, but you should be able to press 10MHz through the line if setup correctly and all is matched. I pressed 8MHz TTL CGA signals through 15..25m of cable with proper buffering and termination without a hitch.

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Re: SPI Signal, long cable and some questions

Postby michu » Mon Apr 23, 2012 5:33 pm

Not necessarily. The noise at the low level (cyan trace) is severe and you even have a glitch. That looks a bit like cross-talk between the clock and data lines. Definitely a sign of problems.
Full ack, my cables are just not really suitable for this kind of signals. I just ordered some cables and soldered some connections on it... I never realized why there exists twisted pair cables and straight cables, until now (or when my issues started...)!

The problem is not the master PSU, but what you have locally. You can have a lot of noise on the buffer's supply, even with a rock stable master supply. The cables are your worst enemy. That is why I wrote about the bypassing and the ferrite bead placed locally.

You should have the probe on the local Vcc/GND pins (at the 5V part) and see what it shows there (use only one scope trace with a floating setup). The buffers are sourcing and sinking a lot of current (probably > 100mA).

Well I throw away my buffers and drive the whole thing with my teensy board. I couldn't see any advantages by using a buffer driver, I just added a 1 kOhm resistor between CLK and DATA in each module. Each module has a simple power supply on it (also 50Ohm decoupling resistors) so I guess thats ok. My problem is that I don't really have a studio with alot of components, so I have to order every simple component, thats the reason I didn't try the ferrite bead.

500kHz is a real pain, but you should be able to press 10MHz through the line if setup correctly and all is matched. I pressed 8MHz TTL CGA signals through 15..25m of cable with proper buffering and termination without a hitch.

Do you have released some information about your projects? Sounds interesting.

Meanwhile I use 125kHz, and it works fine! And I really don't want to debug my installation further, I already invested too much time into that project, I'm just glad it works!

thanks again for your help!
cheers
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