Hi,
I am trying to get a read from some flash that is powered between 1.7-1.9v. I am powering this externally and applying Vpu with this voltage.
I have two Bus Pirates, one running 5.1 firmware, and the other is running 6.3.
I am getting different responses to the Chip ID read of 0x9f with 5.1 firmware:
i
Bus Pirate v3b
Firmware v5.10 (r559) Bootloader v4.4
DEVID:0x0447 REVID:0x3046 (24FJ64GA002 B8)
http://dangerousprototypes.com
HiZ>v
Pinstates:
1.(BR) 2.(RD) 3.(OR) 4.(YW) 5.(GN) 6.(BL) 7.(PU) 8.(GR) 9.(WT) 0.(Blk)
GND 3.3V 5.0V ADC VPU AUX CLK MOSI CS MISO
P P P I I I I I I I
GND 0.00V 0.00V 0.00V 1.80V L L L L L
HiZ>m
1. HiZ
2. 1-WIRE
3. UART
4. I2C
5. SPI
6. 2WIRE
7. 3WIRE
8. LCD
9. DIO
x. exit(without change)
(1)>5
Set speed:
1. 30KHz
2. 125KHz
3. 250KHz
4. 1MHz
(1)>
Clock polarity:
1. Idle low *default
2. Idle high
(1)>
Output clock edge:
1. Idle to active
2. Active to idle *default
(2)>
Input sample phase:
1. Middle *default
2. End
(1)>
CS:
1. CS
2. /CS *default
(2)>
Select output type:
1. Open drain (H=Hi-Z, L=GND)
2. Normal (H=3.3V, L=GND)
(1)>
Ready
SPI>v
Pinstates:
1.(BR) 2.(RD) 3.(OR) 4.(YW) 5.(GN) 6.(BL) 7.(PU) 8.(GR) 9.(WT) 0.(Blk)
GND 3.3V 5.0V ADC VPU AUX CLK MOSI CS MISO
P P P I I I O O O I
GND 0.00V 0.00V 0.00V 1.80V L L L L L
SPI>P
Pull-up resistors ON
SPI>i
Bus Pirate v3b
Firmware v5.10 (r559) Bootloader v4.4
DEVID:0x0447 REVID:0x3046 (24FJ64GA002 B8)
http://dangerousprototypes.com
CFG1:0xF9DF CFG2:0x3F7F
*----------*
Pinstates:
1.(BR) 2.(RD) 3.(OR) 4.(YW) 5.(GN) 6.(BL) 7.(PU) 8.(GR) 9.(WT) 0.(Blk)
GND 3.3V 5.0V ADC VPU AUX CLK MOSI CS MISO
P P P I I I O O O I
GND 0.00V 0.00V 0.00V 1.81V L L L H H
Power supplies OFF, Pull-up resistors ON, Open drain outputs (H=Hi-Z, L=GND)
MSB set: MOST sig bit first, Number of bits read/write: 8
a/A/@ controls AUX pin
SPI (spd ckp ske smp csl hiz)=( 1 0 1 0 1 1 )
*----------*
SPI>[0x9f rrr]
/CS ENABLED
WRITE: 0x9F
READ: 0xDE
READ: 0x80
READ: 0xB0
/CS DISABLED
SPI>SPI>[0x9f rrr]
/CS ENABLED
WRITE: 0x9F
READ: 0xEF
READ: 0x40
READ: 0x16
/CS DISABLED
SPI>[0x9f rrr]
/CS ENABLED
WRITE: 0x9F
READ: 0xEF
READ: 0x00
READ: 0x58
/CS DIS
And with version 6.3 I am not getting any response at all, the BP just hangs
i
Bus Pirate v3.5
Firmware v6.3-beta1 r2151 Bootloader v4.5
DEVID:0x0447 REVID:0x3046 (24FJ64GA002 B8)
http://dangerousprototypes.com
HiZ>v
Pinstates:
1.(BR) 2.(RD) 3.(OR) 4.(YW) 5.(GN) 6.(BL) 7.(PU) 8.(GR) 9.(WT) 0.(Blk)
GND 3.3V 5.0V ADC VPU AUX CLK MOSI CS MISO
P P P I I I I I I I
GND 0.00V 0.00V 0.00V 0.00V L L L L L
HiZ>v
Pinstates:
1.(BR) 2.(RD) 3.(OR) 4.(YW) 5.(GN) 6.(BL) 7.(PU) 8.(GR) 9.(WT) 0.(Blk)
GND 3.3V 5.0V ADC VPU AUX CLK MOSI CS MISO
P P P I I I I I I I
GND 0.00V 0.00V 0.00V 1.79V L L L L L
HiZ>m
1. HiZ
2. 1-WIRE
3. UART
4. I2C
5. SPI
6. 2WIRE
7. 3WIRE
8. LCD
x. exit(without change)
(1)>5
Set speed:
1. 30KHz
2. 125KHz
3. 250KHz
4. 1MHz
(1)>
Clock polarity:
1. Idle low *default
2. Idle high
(1)>
Output clock edge:
1. Idle to active
2. Active to idle *default
(2)>
Input sample phase:
1. Middle *default
2. End
(1)>
CS:
1. CS
2. /CS *default
(2)>
Select output type:
1. Open drain (H=Hi-Z, L=GND)
2. Normal (H=3.3V, L=GND)
(1)>
Clutch disengaged!!!
To finish setup, start up the power supplies with command 'W'
Ready
SPI>v
Pinstates:
1.(BR) 2.(RD) 3.(OR) 4.(YW) 5.(GN) 6.(BL) 7.(PU) 8.(GR) 9.(WT) 0.(Blk)
GND 3.3V 5.0V ADC VPU AUX CLK MOSI CS MISO
P P P I I I I I I I
GND 0.00V 0.00V 0.00V 1.81V L L L L L
SPI>P
Pull-up resistors ON
SPI>i
Bus Pirate v3.5
Firmware v6.3-beta1 r2151 Bootloader v4.5
DEVID:0x0447 REVID:0x3046 (24FJ64GA002 B8)
http://dangerousprototypes.com
CFG1:0xF9DF CFG2:0x3F7F
*----------*
Pinstates:
1.(BR) 2.(RD) 3.(OR) 4.(YW) 5.(GN) 6.(BL) 7.(PU) 8.(GR) 9.(WT) 0.(Blk)
GND 3.3V 5.0V ADC VPU AUX CLK MOSI CS MISO
P P P I I I I I I I
GND 0.00V 0.00V 0.00V 1.81V L H H H H
POWER SUPPLIES OFF, Pull-up resistors ON, Open drain outputs (H=Hi-Z, L=GND)
MSB set: MOST sig bit first, Number of bits read/write: 8
a/A/@ controls AUX pin
SPI (spd ckp ske smp csl hiz)=( 1 0 1 0 1 1 )
*----------*
SPI>[0x9f rrr]
/CS ENABLED
WRITE: 0x9F
CLK and MOSI are pulled high in comparison to the 5.1 firmware version?
Can any help with this?
Topic: SPI strange behaviour (Read 1170 times)
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