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Topic: Questions about HARDWARE mode with I2C protocol (Read 893 times) previous topic - next topic

Questions about HARDWARE mode with I2C protocol

Hi guys.
Is there somebody here who know the whole differences between SOFTWARE and HARDWARE mode in I2C protocol?
I thought the only difference was about how synchronization is generated for the bus, but I am not sure it is just that.
In fact in the recent past thanks to agatti it was possible to free the HARDWARE mode for the I2C protocol also with Bus Pirate v3 (https://github.com/BusPirate/Bus_Pirate/issues/39) but although in my device I have a silicon revision B8 (DEVID:0x0447 REVID:0x3046 = 24FJ64GA002 B8) I noticed a weird behavior.
The weird thing is that while play I2C on a serial EEPROM using HARDWARE mode I can hit the chip only the first time, performing new access the answers are always wrong (0xFF).
So, for example, while performing read of data from a given block of memory I get them right only the first time because by repeating the command I get wrong data as 0xFF.
In order to fix I have to reset the Bus Pirate with command "#" and setting again all the I2C parameters.
(Macro (1) always works also by repeating it).
Instead using SOFTWARE mode I have not any problem performing all the commands I want without getting wrong answers.
I know that due the different PIC used the Bus Pirate v4 has always had the HARDWARE mode unlocked as opposed to v3, which also depends on the silicon revision (http://ww1.microchip.com/downloads/en/D ... 00470j.pdf).
Is there someone who owns the v4 and can confirm that it is the intended behavior?
Otherwise it is very likely to be a bug.
Thanks!

Be seeing you.

U.Sb

Re: Questions about HARDWARE mode with I2C protocol

Reply #1
Hi guys.
After a long time today, by chance, I found what the answer should be:

http://dangerousprototypes.com/blog/2009/08/10/bus-pirate-hardware-i2c-added/

http://dangerousprototypes.com/blog/2009/08/07/find-your-bus-pirates-pic-revision/

So actually there should be no side effect in activating the Hardware I2C mode without honoring the silicon hardware revision of the PIC, simply then it would not work.
I read that there was a warning message in case the silicon hardware revision of the PIC had not been the expected one, but I do not know if this warning is still present and active in the nowaday new firmwares and I do not have a Bus Pirate wich has one of the buggy silicon revisions of the PIC in order to check it.

Be seeing you.

U.Sb

Re: Questions about HARDWARE mode with I2C protocol

Reply #2
We took out the hardware I2C option and warning really early on because it created a lot of chaos. There's probably a total of 100 Bus Pirates (it may have been the batch done for Hack a Day, predating Dangerous Prototypes, but I don't remember) out there with the bad silicon revision. HW I2C could be enabled with a compiler switch, at least in the past.
Got a question? Please ask in the forum for the fastest answers.

 

Re: Questions about HARDWARE mode with I2C protocol

Reply #3
Hi Ian.
Thanks for the kind reply.
My device has the right silicon revision of the PIC and in fact I use a compiled firmware with the I2C Hardware mode enabled.
Just like you wrote, nowadays the firmware v7.x allows to choose whether to enable or disable the I2C Hardware mode simply by activating it in the MPLAB compiler.

Be seeing you.

U.Sb