Dangerous Prototypes Open Source Hardware

Delay Capture in LogicSniffer

February 18, 2016, 12:01:08 am

Problem:

I'm trying to capture SPI activity that occurs after my circuit gets started.  I can't figure out how to delay the moment when the capture starts and see further activity beyond what's shown in the attached image. 

What I've done:

1. The trigger mask that I set up doesn't work.
2. As another attempt, I saw the Delay setting in the trigger tab which says "Delays trigger # samples after its condition is met."  So I set it to 3000 based on the BP's 4K memory size.

Am I misunderstanding how triggers work?  Any suggestions?  BTW, I've update my BP to Bus Pirate v3a Firmware v5.10 (r559)  Bootloader v4.4.  In terms of v3 hardware version, the bottom of the PCB is labelled "2/10/2010".

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Re: Delay Capture in LogicSniffer

Reply #1 – February 26, 2016, 12:19:17 pm

I’m not sure that the BP supports delaying the actual capturing. This feature is present in the original SUMP and the OBLS, but given the many ports of the SUMP protocol to the many different devices it could well be that not all features are supported on them. I’ve looked briefly in the firmware of the BusPirate (see [1]), but I cannot see anything that suggests that this feature is supported.

What you might want to try is to define a trigger for your signal: SPI works with a /CS signal which needs to be asserted if the master wants to talk to a slave. The BP does have support for simple triggers (only 1 stage IIRC), which might be just enough for your capture to work.

Hope this helps,

1. http://dangerous-prototypes-open-hardwa ... are/SUMP.c