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Topic: Improvements to Logic Analyzer (Read 8790 times) previous topic - next topic

Improvements to Logic Analyzer

I noticed that the times in the Logic Analyzer were not very accurate (I have a Bus Pirate v3), so I modified the firmware to correct it. As long as I was in there, I also increased the maximum sample rate from about 1 MHz to 4 MHz. Then I added sampling prior to the trigger. Is anyone else interested in this, or do the people that care already use the Logic Sniffer?

Re: Improvements to Logic Analyzer

Reply #1 –
Hi;
  I am interested, and I am sure others are too.
Please publish your code and hex file here.

I run Fedora linux and cannot get stuff to compile.

Mick M

Re: Improvements to Logic Analyzer

Reply #2 –
If you put the changes here, we can push them to the SVN. :)

Re: Improvements to Logic Analyzer

Reply #3 –
I'm glad people are interested :). I am cleaning up the code so it is more understandable, then I will post it. I use Windows and MPLab X. For some reason, when I load my hex file it halts due to trying to write over the bootloader, but it seems to load enough of the file for it to work.

Re: Improvements to Logic Analyzer

Reply #4 –
Hi LAtimes,

very glad to hear that, you are welcome!
It is much terrific awesome what you're doing.
Would be great if you could provide the update.
Thanks in advance!
 
Regards,
 
U.Sb

Re: Improvements to Logic Analyzer

Reply #5 –
Here's my code and a hex file for the improved logic analyzer. Improvements are:
1. Accurate timing up to 4 MHz
2. Pre-sampling prior to trigger up to 1 MHz. To use in OLS client, enable trigger and adjust Before/After ratio on Triggers tab.

If you use my hex file, the 'i' command will say Firmware v6.1 SUMP test.
Known limitations: I've only tested with a v3 Bus Pirate. I compiled with optimization O1. If no optimization, 1 MHz timing may be off by 10-20%.

Re: Improvements to Logic Analyzer

Reply #6 –
[quote="LAtimes"Known limitations: I've only tested with a v3 Bus Pirate. I compiled with optimization O1. If no optimization, 1 MHz timing may be off by 10-20%.[/quote]
No problem on v3, we can adapt it to v4 if required. Optimization is a bummer, policy was using no optimization if I remember correctly. However, it can still be pushed to the SVN considering it has very nice improvements. :)

Re: Improvements to Logic Analyzer

Reply #7 –
I just checked it without optimization and 1 MHz seems to have correct timing. I forgot that I made some changes last night to remove some extra code, which got it just within spec.

Re: Improvements to Logic Analyzer

Reply #8 –
Well, I have more improvements:

a) sampling rates up to 16 MHz
b) additional samples when using fewer channels (up to 32k for 1 channel)
c) trigger location anywhere in the buffer
d) backward compatible with previous Logic Analyzer modes

To use the new features requires loading new firmware on the Bus Pirate and a new profile for the OLS client, both of which are included in the files below. See readme.txt on how to use the new enhancements.

Let me know if you use it and like it :). Or any problems :(

Re: Improvements to Logic Analyzer

Reply #9 –
Hi LAtimes,

thank you very much for all these additional improvements!
Really a good news, congratulations!
Terrific amount of new performances and features, really hard to believe!
Sadly I am a little busy right now and above all I am far from my Bus Pirate at this moment...
However, I am confident that surely I will check it the next weekend.
Thanks again!

Regards,

U.Sb

Re: Improvements to Logic Analyzer

Reply #10 –
Thanks, nice update! Added to tracker and will push to SVN.
Got a question? Please ask in the forum for the fastest answers.

Re: Improvements to Logic Analyzer

Reply #11 –
Hi LAtimes,

first apologize me for the late in the answer and over all due the fact I'm a little hurry right now.
Hexadecimal firmware is loaded good in the BP, no problem.
Client recognize new features after adding the new profile and response of metadata button confirm all it's good.
I tried to take some shot, though I been able to only get 8MHz square wave on all channels using any available sampling rate.
Because I'm babo surely I did do something wrong, no way!
Only sad side for me it is based on 6.1 release while for various reasons I need the features of the 6.3, so I have to reload this latter on my BP.
Anyway great piece of software both hardware and client side which improve a lot the device.
Thank you very much and congratulations again one million time and more!

Regards,

U.Sb

Re: Improvements to Logic Analyzer

Reply #12 –
This looks great!

Like USBE mentioned about, is there any chance this could be done to 6.3 firmware? That would be fantastic, if so!

Re: Improvements to Logic Analyzer

Reply #13 –
Hi guys.
Sorry to exhume a such old thread.
This is only to bring to the attention of all about the thing so that somebody who has the skills, even anyone else than not the author of the improvements, can give a help if he wants.
It would merge the contents of SUMP.c Enhanced Logic Analyzer into the SUMP.c inside the current repository so that the new features are available.
I know nothing, but I understand this must be very difficult to achieve, though perhaps it is not impossible:
 
https://github.com/BusPirate/Bus_Pirate/issues/32
 
Thanks.
 
Be seeing you.
 
U.Sb