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Topic: Open Logic Snifffer as logic comparator (Read 3115 times) previous topic - next topic

Open Logic Snifffer as logic comparator

Hi all,
Just wondering if it would be possible to use ihe Logic Open Sniffer as a logic comparator to test logic functions of TTLs in circuit  , I think something could be done with CSV exporting format.Anyone has tried this?
Thanks in advance

Re: Open Logic Snifffer as logic comparator

Reply #1 –
There are various things that can be done, it all depends on your intended workflow.
It is a bit unclear what the problem are you trying to solve, more exactly if you want to also generate signals from the OLS or just record the inputs and output(s) of your circuit and evaluate that in software say on your PC or on the PIC or even on the FPGA.

As you mentioned in circuit I assume you have the simple scenario where you generate the signals from other boards (or internally on the board where you have the ttl circuit connected) and connect say the inputs of the circuit to test and its output say as 3 signals to OLS, and use a PC to capture and evaluate the results based on your intended functionality.  This should be relatively simple.

As far as the logic levels are concerned the OLS can be connected with your TTL (5V logic) at the buffered pins but only as inputs  so you cannot send signals from those pins, just receive them. If you would like to also send signals from the OLS you could do it on the "wing" connector wit the appropriate level translator but this is another story. 

Regarding the software side, you have at least several options.

1) Write an Open Logic sniffer protocol analyser for the Java client (this might be a bit overengineered)
2) Just bypass the GUI and
use the sump protocol to talk directly over the serial link to the PIC uC, make a capture and evaluate the results.

See http://www.sump.org/projects/analyzer/protocol/ and http://dangerousprototypes.com/docs/The ... P_protocol.

3) Change the PIC firmware or FPGA bitstream to do what you intend at a lower level (probably not what you want if you don't know much about uCs or FPGA).

I would recommend option 2 that gives you quite some flexibility. I used a simple command line/console app (if I remember correctly I modified the bus pirate firmware updater, that has all the serial port "glue" in place and just updated the commands to send) to capture traffic from a clock/weather station and decode the time and temperature from there.
 
This solution has the advantage that you can easily do want you want with the captured data or when to capture. You could do  automatic retrigger using a loop or pressing a key and the program could capture the stream and interpret it instead of pressing the capture button in the java client and the exporting or using a protocol analyzer.

Regards,
tkg

Re: Open Logic Snifffer as logic comparator

Reply #2 –
[quote author="tkg"]There are various things that can be done, it all depends on your intended workflow.
It is a bit unclear what the problem are you trying to solve, more exactly if you want to also generate signals from the OLS or just record the inputs and output(s) of your circuit and evaluate that in software say on your PC or on the PIC or even on the FPGA.
[/quote]

Hi and thanks for replying.No, I just want to sniff for inputs and outputs and validate the logic functions of the TTL.Let's say I want to test an inverter LS04 in-circuit, so I clip the IC on the unit under test  and measure  signals of each pin (including VCC and GROUND).SO, let's say, If all input  1-3-5-9-11-13 are '1' then the outputs 2-4-6-8-10-12 should be '0'.Here I'd want something that could tell me if the logic functions are OK without analizyng the single singla on each pin and then comparing them looking at the truth table.
Obviously , besides gates, also voltage on VCC pin would be monitored and validate  .


Quote
As you mentioned in circuit I assume you have the simple scenario where you generate the signals from other boards (or internally on the board where you have the ttl circuit connected) and connect say the inputs of the circuit to test and its output say as 3 signals to OLS, and use a PC to capture and evaluate the results based on your intended functionality.  This should be relatively simple.

Yes, obviously, signals would be generated from the unit under test and not from OLS.



 
Quote
2) Just bypass the GUI and
use the sump protocol to talk directly over the serial link to the PIC uC, make a capture and evaluate the results.

See http://www.sump.org/projects/analyzer/protocol/ and http://dangerousprototypes.com/docs/The ... P_protocol.



I would recommend option 2 that gives you quite some flexibility. I used a simple command line/console app (if I remember correctly I modified the bus pirate firmware updater, that has all the serial port "glue" in place and just updated the commands to send) to capture traffic from a clock/weather station and decode the time and temperature from there.
 
This solution has the advantage that you can easily do want you want with the captured data or when to capture. You could do  automatic retrigger using a loop or pressing a key and the program could capture the stream and interpret it instead of pressing the capture button in the java client and the exporting or using a protocol analyzer.

Regards,
tkg

I think someone already did what I mean or it could be a nice feature to add to OLS.Anyway I will study the protocol and try to implement something.
Thanks again.

Re: Open Logic Snifffer as logic comparator

Reply #3 –
Hi,

I understand better now, it is not just the logic function that you want to test but also if the VCC and GND are properly connected.

That is a bit more difficult :), if you want to get it properly done. First of all, on the buffered ports from the OLS you will not be able to measure analog voltages, just the 0 or 1 logic values.  However, if you connect a known good GND on the board for the circuit under test to the GND of the OLS, you should be able to build from there.

More exactly you could then connect the  GND from the circuit under test using say an 100kohm pull-up to a known good VCC (either 5v from OLS, or pretested 5v (you mentioned ttl) point from your board under test (not the vcc pin for the circuit under test, as that might be floating) and to an input pin on the OLS.

With the pull-up if the circuit gnd pin was floating (say not making contact with the board), it will read as 1 (that would be faulty) and 0 for good connection.

The Vcc pin for the circuit under test  pin can be connected to an input pin on the OLS by using again an 100kohm but this time pulled down to a good known GND.

With the pull-down the OLS will read on this pin a 0 for a faulty/not connected  Vcc and 1 for a working one.

For the rest of the pins you will have to toggle the inputs from the board under test if you want varying circuit outputs.

As for the software side you need to send a few reset commands, set the capture size, number of channels/groups,  filters, and frequency divisor and then issue a go command.  After that read the expected data... and evaluate it. :)

Regards,
tkg