BusBlaster v2 and XC9572XL_VQ44
After wasting a lot of time with urjtag flakey-ness from the Fedora 17 urjtag-0.10-2 package I finally pulled the SVN head of urjtag and now I'm attempting to load the DP XC9572XL dev board CPLD with some new code via the BB2 and it fails:
jtag> cable jtagkey
Connected to libftd2xx driver.
jtag> detect
IR length: 8
Chain length: 1
Device Id: 01011001011000000100000010010011 (0x59604093)
Manufacturer: Xilinx (0x093)
Part(0): xc9572xl (0x9604)
Stepping: 1
Filename: /usr/local/share/urjtag/xilinx/xc9572xl/xc9572xl_vq44
jtag> svf /default.svf stop progress
Error svf: mismatch at position 17 for TDO
in input file between line 52 col 1 and line 52 col 49
error: Error occurred for SVF command, line 51, column 0-48:
SDR.
detail: Parsing 5040/5042 ( 99%)detail:
detail: Mismatches occurred between scanned device output and expected TDO values.
jtag>
This error message is suspiciously similar to another topic recently posted about another chip and urjtag.
Some notes: while the urjtag release download page hasn't been updated in ages (April '09), the SVN HEAD as of today is definitely significantly different. I'm no longer getting strange hanging and detection problems now that I've switched to the SVN code with the BB2. Now instead of wondering about wonky cables, a dead BB2 or otherwise, I'm just having downloading problems as listed above.
Topic: BusBlaster v2 and XC9572XL_VQ44 (Read 1970 times)
previous topic - next topic
Open Source Hardware