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Topic: Bus Blaster v4 power up test success, bitstream next (Read 50433 times) previous topic - next topic

Re: Bus Blaster v4 power up test success, bitstream next

Reply #30
Code: [Select]
C:UsersGrapsusDesktop>BusPiratev2Test_VisualC++Express.exe -delay -n0
Select device:
Device 0 (Serial Number: A
Device 1 (Serial Number: B

======================================================
SUCCESS (Connected to the FTDI.A)
SUCCESS (reset)
SUCCESS (usb parameters set)
SUCCESS (event chars disabled)
SUCCESS (timeouts set)
SUCCESS (latency set)
SUCCESS (flow control disabled)
SUCCESS (MSSPE reset)
SUCCESS (MPSSE on)
START TESTING

======================================================
        00000001        00000001
        00000010        00000010
        00000100        00000100
        00001000        00001000
        00010000        00010000
        00100000        00100000
        01000000        01000000
        10000000        10000000
        00000000        00000000
        10101010        10101010
        01010101        01010101
        00000000        00000000
        11111111        11111111
Testing complete, errors: 0

I confirm that my Bus Blaster v4.1 is up and running without any patch wire.

I'm kind of ashamed : at first the test was giving 4 errors suggesting a short between TRST and DBGRQ and indeed I left a small blob of solder between two legs of RN3 which is so easy to solder compared to the CPLD.

@mikelelere thank you for sharing the SVF for XC2C128 test image !

Re: Bus Blaster v4 power up test success, bitstream next

Reply #31
Here is a better picture after a good IPA cleaning, in case you want to post it on your blog.

Re: Bus Blaster v4 power up test success, bitstream next

Reply #32
I soldered an I2C EEPROM and customized the VID/PID data with the utility from FTDI :

Code: [Select]
[  113.023463] usb 2-1.1: new high-speed USB device number 4 using ehci_hcd
[  113.120867] usb 2-1.1: New USB device found, idVendor=0403, idProduct=8879
[  113.120879] usb 2-1.1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[  113.120887] usb 2-1.1: Product: Bus Blaster
[  113.120893] usb 2-1.1: Manufacturer: Dangerous Prototypes
[  113.120899] usb 2-1.1: SerialNumber: 4.1

As expected the device stopped being recognized by Windows, so I had to create an inf file and install it manually, which is kind of painful. Hopefully I don't use Windows much.
For Linux there seems to be a big drawback : urJTAG doesn't recognize the chip anymore, even with "cable ft2232 vid=... pid=...".
The solution I found is to provide a file named "libft2dxx_table.so" which tells the FTDI driver to take your custom PID into account. It can build using this source :
http://svn.icmb.utexas.edu/svn/reposito ... lib_table/

It will be pretty annoying to do that on every computer on which I will use my bus blaster, so I'm not sure if I will keep the custom PID.

@Ian please could you please release the source code of the test utility ? I'd like to study it and port it to Linux, which shouldn't be too complicated.

Re: Bus Blaster v4 power up test success, bitstream next

Reply #33
Thanks for the tests, pictures, and posts.

The code for the utility is in SVN here:
http://code.google.com/p/dangerous-prot ... 253Dclosed

I think it will actually be easier to run the test under linux, on windows the compiling with divers is a pain to get setup.
Got a question? Please ask in the forum for the fastest answers.

Re: Bus Blaster v4 power up test success, bitstream next

Reply #34
Here is a patch so that the test utility builds both on Linux and Windows :
Code: [Select]
Index: main.cpp
===================================================================
--- main.cpp (revision 2034)
+++ main.cpp (working copy)
@@ -11,14 +11,23 @@
  *
  */
 
+#ifdef _WIN32
 #include <Windows.h>
 #include <WinDef.h>
+#else
+#include <inttypes.h>
+typedef uint32_t DWORD;
+#endif
 #include <stdio.h>
 #include <stdlib.h>
 #include <malloc.h>
 #include <time.h>
 
+#ifdef _WIN32
 #include "ftdi/ftd2xx.h"
+#else
+#include <ftd2xx.h>
+#endif
 
 #define MAX_DEVICES 10
 
@@ -37,17 +46,16 @@
 FT_STATUS    ftStatus;
 int          shortDelay;
 
-
+#ifdef _WIN32
 struct timespec {
-  int tv_sec;        /* seconds */
-  long  tv_nsec;      /* nanoseconds */
+  int tv_sec;        /* seconds */
+  long  tv_nsec;        /* nanoseconds */
 };
+#endif
 
-
 struct timespec T;
 
-
-
+#ifdef _WIN32
 void nanosleep(struct timespec *x, struct timespec *y){
  if (shortDelay){
    Sleep(10);
@@ -55,6 +63,7 @@
        Sleep(1000*x->tv_sec+x->tv_nsec/100000000);
  }
 }
+#endif
 
 unsigned char kbhit_getc()
 {
Index: Makefile
===================================================================
--- Makefile (revision 0)
+++ Makefile (working copy)
@@ -0,0 +1,7 @@
+all: BusPiratev2Test
+
+BusPiratev2Test: main.o
+ gcc -o $@ $< -lftd2xx
+
+clean:
+ rm -f *.o BusPiratev2Test

Assuming you installed ftd2xx.h and libftd2xx.so to /usr or /usr/local, just use make to build.

Code: [Select]
$ make
g++    -c -o main.o main.cpp
gcc -o BusPiratev2Test main.o -lftd2xx
$ sudo ./BusPiratev2Test -n0
Select device:
Device 0 (Serial Number: 4.1A
Device 1 (Serial Number: 4.1B

======================================================
SUCCESS (Connected to the FTDI.4.1A)
SUCCESS (reset)
SUCCESS (usb parameters set)
SUCCESS (event chars disabled)
SUCCESS (timeouts set)
SUCCESS (latency set)
SUCCESS (flow control disabled)
SUCCESS (MSSPE reset)
SUCCESS (MPSSE on)
START TESTING

======================================================
00000001 00000001
00000010 00000010
00000100 00000100
00001000 00001000
00010000 00010000
00100000 00100000
01000000 01000000
10000000 10000000
00000000 00000000
10101010 10101010
01010101 01010101
00000000 00000000
11111111 11111111
Testing complete, errors: 0

Re: Bus Blaster v4 power up test success, bitstream next

Reply #35
Thanks to skot9000 and the "Bus Blaster v2 manufacturing resources" post I was able to setup my BBv4.1a.

IMG_4533 by systems tech, on Flickr

Code: [Select]
UrJTAG 0.10 #1869
Copyright (C) 2002, 2003 ETC s.r.o.
Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors

UrJTAG is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
There is absolutely no warranty for UrJTAG.

jtag.c:518 main() Warning: UrJTAG may damage your hardware!
Type "quit" to exit, "help" for help.

jtag> cable ft2232 interface=1
Connected to libftd2xx driver.
jtag> bsdl path c:/bsdl
jtag>
jtag> detect
IR length: 8
Chain length: 1
Device Id: 00000110111001011100000010010011 (0x06E5C093)
  Filename:    c:/bsdl/XC2C64A.bsd
jtag> svf c:/svf/bbv4.svf progress stop
Parsing  1210/1217 ( 99%)
Scanned device output matched expected TDO values.
jtag>

Now to try to do the self test.

Re: Bus Blaster v4 power up test success, bitstream next

Reply #36
What were the changes between v4, v4.1 and v4.1a?  Was the only hardware issue the 1.8V fix and a re-layout to the standard PCB size, or did other things change?  Are there any other modifications that need to be done to bring a V4 board up to V4.1a functionality wise?  I built up a V4 with the 1.8V mod wire back in the day, but didn't test it any further than plugging it in and talking to the FTDI chip.

Re: Bus Blaster v4 power up test success, bitstream next

Reply #37
**Was the only hardware issue the 1.8V fix and a re-layout to the standard PCB size, or did other things change?

That's it, v4.1 should otherwise be fine.
Got a question? Please ask in the forum for the fastest answers.

Re: Bus Blaster v4 power up test success, bitstream next

Reply #38
Is there an expected timeframe for the BBv4 to hit resale in EU ?

I'm looking for a BB , but it seems like only v2' are on sale , did v3 ever hit the market ?

Ohh.. And is BBv4 as "usable" as the v2 , i mean is the firmware done ?

I will be able to do reprogramming on the CPLD (have a Xilinx Jtag) , and a BusPirate.
But i'm a noob on VHDL and/or Verilog yet ....

So i can only program a ready made bitstream.

/Bingo

Re: Bus Blaster v4 power up test success, bitstream next

Reply #39
>>Is there an expected timeframe for the BBv4 to hit resale in EU ?

Depends if anyone wants to carry it :) We haven't even started manufacturing so it could be a while.

>>I'm looking for a BB , but it seems like only v2' are on sale , did v3 ever hit the market ?

v3 is just v2 with a new shape, also not manufactured yet.

>>Ohh.. And is BBv4 as "usable" as the v2 , i mean is the firmware done ?

Yes, v4 is "done" and no further updates are needed (assuming there's no hardware bugs that crop up later). It is just an update of v2/3 with the "you will never even find a chip that uses it" feature of the new SWD reduced wire debugging protocol.

>>I will be able to do reprogramming on the CPLD (have a Xilinx Jtag) , and a BusPirate.
But i'm a noob on VHDL and/or Verilog yet ....

BB is usb upgradable, so no programmer needed :)
Got a question? Please ask in the forum for the fastest answers.