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BBv2 JTAGkey implementatoin

Here's an updated JTAGKEY buffer in Verilog. I ported robots VHDL source and compiled. Hopefully this will solve some of the incompatibilities with some platforms.
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Re: BBv2 jtagkey logic

Reply #1
Two versions attached. One in Verilog, one from robots' original VHDL version. Please let me know if this helps.
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Re: BBv2 jtagkey logic

Reply #2
Hi ian,
I tested both version and non one work fine with my PandaBoard with OpenOCD under WindowsXP SP3 see the log below (flashed with success with jtag-rev11.exe):
Quote
BBv2-JTAGkey-v1.4-VHDL.svf & BBv2-JTAGkey-v1.4-verilog.svf log with PandaBoard
OpenOCD version downloaded here http://www.freddiechopin.info/index.php ... /4-openocd

Open On-Chip Debugger 0.5.0 (2011-08-09-23:21)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.berlios.de/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
RCLK - adaptive
Using dbgbase = 0x80000000
force hard breakpoints
trst_only separate trst_push_pull
Info : max TCK change to: 30000 kHz
Info : RCLK (adaptive clock speed)
Error: couldn't read enough bytes from FT2232 device (0 < 81)
Error: couldn't read from FT2232
in procedure 'runtest'
Info : JTAG tap: omap4430.jrc tap/device found: 0x000000ff (mfg: 0x07f, part: 0x
0000, ver: 0x0)
Warn : JTAG tap: omap4430.jrc      UNEXPECTED: 0x000000ff (mfg: 0x07f, part: 0x
0000, ver: 0x0)
Error: JTAG tap: omap4430.jrc  expected 1 of 2: 0x3b95c02f (mfg: 0x017, part: 0x
b95c, ver: 0x3)
Error: JTAG tap: omap4430.jrc  expected 2 of 2: 0x1b85202f (mfg: 0x017, part: 0x
b852, ver: 0x1)
Error: Trying to use configured scan chain anyway...
Error: couldn't read enough bytes from FT2232 device (0 < 2)
Error: couldn't read from FT2232
Warn : Bypassing JTAG setup events due to errors

Old version of JTAGKey seems to work really better see log:
Quote
Tested with BBv2-JTAGkey-v1.0.svf, BBv2-JTAGkey-v1.2.svf and BBv2-JTAGkey-v1.3.svf
Open On-Chip Debugger 0.5.0 (2011-08-09-23:21)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.berlios.de/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
RCLK - adaptive
Using dbgbase = 0x80000000
force hard breakpoints
trst_only separate trst_push_pull
Info : max TCK change to: 30000 kHz
Info : RCLK (adaptive clock speed)
Info : JTAG tap: omap4430.jrc tap/device found: 0x3b95c02f (mfg: 0x017, part: 0x
b95c, ver: 0x3)
Info : JTAG tap: omap4430.dap enabled
Polling target failed, GDB will be halted. Polling again in 100ms
Polling target failed, GDB will be halted. Polling again in 300ms
Info : JTAG tap: omap4430.m30_dap enabled
Polling target failed, GDB will be halted. Polling again in 700ms
Info : JTAG tap: omap4430.m31_dap enabled
Warn : Invalid ACK 0x6 in JTAG-DP transaction
Polling target failed, GDB will be halted. Polling again in 1500ms
Polling target failed, GDB will be halted. Polling again in 3100ms

Anyway even with old version of BBv2-JTAGkey-v1.3.svf my PandaBoard cannot be debugged maybe because of the "Warn : Invalid ACK 0x6 in JTAG-DP transaction" because when i launch gdb (yagarto GDB for ARM), OpenOCD 0.5.0 just crash
Quote
Launch GDB debug session with OpenOCD 0.5.0 for PandaBoard crash (using BusBlasterV2):
arm-none-eabi-gdb.exe
target remote localhost:3333
OpenOCD 0.5.0 immediately crash:
with error code : 0xC00000005 Address : 0x004621c9 which corresponds after analysis to arm_reg_current() function in file openocd-0.5.0sourceopenocd-0.5.0srctargetarmv4_5.c on this line
r = arm->core_cache->reg_list + arm->map[regnum];
GDB info:
Info : accepting 'gdb' connection from 3333
Warn : acknowledgment received, but no packet pending
undefined debug reason 6 - target needs reset
Best Regards
Benjamin

Re: BBv2 jtagkey logic

Reply #3
Hello,

Just some news for PandaBoard debug with BusBlaster V2, it works now !!
Just an advice for Windows users do not use OpenOCD 0.5.0 from here http://www.freddiechopin.info/index.php ... /4-openocd it just do not work correctly here.
To fix my problems i just have rebuilt openocd 0.5.0 under cygwin and it work fine now !!

Best Regards

Benjamin
Best Regards
Benjamin

Re: BBv2 jtagkey logic

Reply #4
Hi benjamin,

Thanks for the update, i,m glad you got it going.

I will add a note to the wiki.

Did it end up working with all the different buffers now?
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Re: BBv2 jtagkey logic

Reply #5
Hi Ian I have not resteted all Buffer configuration but only the BBv2-JTAGkey-v1.3.svf, i will test later with latest v1.4 to see if all work fine.

Also an other interesting stuff BusBlasterV2 hardware is very similar to XDS100v2 schematics and maybe we could upgrade it only through software to be detected as XDS100v2 by CodeComposer it will be very cheap and interesting solution with usage of a good IDA Code Composer which is free for personal use and can debug tons of Texas Instrument chips.

For information on schematics of XDS100v2 (you must be registered) see here http://software-dl.ti.com/dsps/dsps_reg ... matic(rev2)-Setup.zip
They use the same FTDI and XILINX chip but I have not checked the connections ...
Best Regards
Benjamin


Re: BBv2 jtagkey logic

Reply #7
Thanks for the updates. I think (now sure anymore) that the BBv2 is actually a clone of the XDS100v2 :) We used different programming connections (the second JTAG port on the newer FTDI chip), but essentially everything is the same. Their buffer bitstream may even load without changes. No matter what we should be able to get something going though.
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