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Topic: BBv2 KT-link implementation (SWD support) (Read 23838 times) previous topic - next topic

BBv2 KT-link implementation (SWD support)

The KT-link hardware is designed to support the new two-wire SWD JTAG interface, as well as the bigger SWV protocol. It will be the first hardware (already) to support SWD from OpenOCD and urJTAG.

BBv2 can clone the KT-link front-end buffer, EXCEPT for the RX connection on BDBUS1. That means BBv2 can do SWD, but not SWV.

I started a schematic implementing the KT-link interface. The only thing I'm unsure of are the two MUX controlled by ADBUS5. It looks like the top one is opposite the one feeding TDO. I guess I need to inverse the selector of one of the MUX signals, but which? Which way is the high level default?

I'm guessing:

Top one:
L= TDI->output
H= TMS->output

Middle:
H TDO<-TDO
L TDO<-TMS

The bottom mux is left out because we don;t have the RX pin available on BBv2.

Any ideas?
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Re: SWD - BBv2 CPLD KT-link implementation

Reply #1
I got some help from the (I think) developer of libswd:
http://libswd.sf.net/

Quote
*Buffers
0 output
1 HiZ

*GPIOL1/ADBUS5
0 TDI and TDO -> TMS,SWDIO
1 TMS->TMS,SWDIO; TDO->TDO,SWO
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Re: SWD - BBv2 CPLD KT-link implementation

Reply #2
Schematic and SVF for the Bus Blaster v2 KT-link buffer clone are attached.

I also started a new wiki page for the buffer clones here:
http://dangerousprototypes.com/docs/Bus ... fer_clones
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Re: SWD - BBv2 CPLD KT-link implementation

Reply #3
I haven't had time to get any deeper on this.. but does it mean that I will have to reflash the CPLD every time I want to switch between SWD and regular JTAG or it will be possible to change it preferably by placing a jumper on two of the JP2 pins?

Re: SWD - BBv2 CPLD KT-link implementation

Reply #4
great idea. We don;t use many resourced in the CPLD, a combined image should be possible. The KT-link can do regular JTAG too, but it is not as widely supported as the jtagkey.

I'd prefer to write that in Verilog though :)
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Re: SWD - BBv2 CPLD KT-link implementation

Reply #5
so i need to have one post to write full sentence then? ;]
CeDeROM, SQ7MHZ

Re: SWD - BBv2 CPLD KT-link implementation

Reply #6
If you need any support regarding libswd please let me know, I will make a first release this week and then move to OpenOCD integration as the basic UrJTAG integration is now complete.
CeDeROM, SQ7MHZ

Re: SWD - BBv2 CPLD KT-link implementation

Reply #7
What's the status of SWD support? I can't work out from the docs or this thread whether or not it is usable!

Re: SWD - BBv2 CPLD KT-link implementation

Reply #8
We're getting lots of reports that the KTLINK buffer that supports SWD works great. I do now know if anyone has used it with SWD specifically, but it should work with anything that supports SWD via the KTLINK buffer.
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Re: SWD - BBv2 CPLD KT-link implementation

Reply #9
Yes, using KTLink, you can do SWD fine (at least for ARM Cortex M0/M3 programming).  I haven't tried any other flavor yet.  That is, if you can find a programming environment which supports SWD.  Unfortunately, SWD support in OpenOCD seems to still be non-existent.  There are a number of commercial solutions for Windows but for Linux or OS X, you pretty much are limited to CrossWorks (for ARM support, anyway) as far as I've been able to find out. I used the 30 day free trial of CrossWorks for ARM and that worked fine on OS X with BBv2 (KTLink) and SWD.  But the ARM version of CrossWorks costs at least $150, even for a personal license and I can't justify that right now for a hobby project.  Seems like a nice package though.

Re: SWD - BBv2 CPLD KT-link implementation

Reply #10
Thanks for the report. I always sweat bullets while the initial production gets to live users, it's great to know it is working for you.
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Re: SWD - BBv2 CPLD KT-link implementation

Reply #11
I've been having some hard time getting KT-Link buffer for BBv2 to work in SWD mode with either Cross Studio or OpenOCD :/ The target itself is fine as I can connect to it over SWD using another programmer ( I tried both STM32 and LPC1xxx ), but BBv2 just won't do. This is a BB v 2.1a board I built from a free PCB and it just won't connect to the target. The only error I am getting is 'Check target connection' or similar equivalent.

I am using TMS pin as SWDIO and TCK pin as SWCLK + GND and VTG to power up the target board. I have used OLS to grab the signals but they don't tell me much and as I don't have much time now, I just wanted to ask if anybody struggled with the same problem? Or maybe there is a way to verify it easily?

I forgot to mention that the jtagkey buffer works okay with CPLD so I believe it is not my bad soldering that's causing it.