Dangerous Prototypes

Dangerous Prototypes => Bus Pirate Support => Topic started by: thinker29 on March 04, 2018, 08:19:09 am

Title: How to generate arbitrary logic with bus pirate ?
Post by: thinker29 on March 04, 2018, 08:19:09 am
Hello all,
I would like to use bus pirate to generate arbitrary logic signal, eg:
 step 1: select a clock out source, eg: 115000 bit/sec
 step 2: write 0xe1 0xe2 0xe3 , this will write 24 bits continuously at 115000 bit/sec rate.

BP supports uart but this is not uart, as there is no need for start/stop bit and parity. Just arbitrary clock out of data bits.

Thanks!
Jason.
Title: Re: How to generate arbitrary logic with bus pirate ?
Post by: USBEprom on March 04, 2018, 12:45:48 pm
Hi Jason.
Sorry, I know nothing but perhaps you can try to take a look a this:

http://openschemes.com/2012/03/14/bus-p ... ddle-tool/ (http://openschemes.com/2012/03/14/bus-pirate-bit-bang-twiddle-tool/)

It is provided with source code, so maybe you can change some things to make the best from it.

Be seeing you.

U.Sb
Title: Re: How to generate arbitrary logic with bus pirate ?
Post by: tayken on March 08, 2018, 03:01:27 pm
How about binary scripting mode? http://dangerousprototypes.com/docs/Bus ... pting_mode (http://dangerousprototypes.com/docs/Bus_Pirate#Binary_scripting_mode)

Not sure about the speed requirement but either the SPI or the raw-2wire modes should get you started:
http://dangerousprototypes.com/docs/SPI_(binary (http://dangerousprototypes.com/docs/SPI_(binary))
http://dangerousprototypes.com/docs/Raw-wire_(binary (http://dangerousprototypes.com/docs/Raw-wire_(binary))
Title: Re: How to generate arbitrary logic with bus pirate ?
Post by: USBEprom on March 08, 2018, 08:55:41 pm
Hi tayken.
Thank you very much for reporting, sir.
I missed that, I did not know it.
I really appreciated your post, thanks tayken!

Be seeing you.

U.Sb

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