Please excuse me if I have missed something but site documentation is unclear and doing wiki/forum/Internet search, I was unable to find a clear answer.
Site docs explicitly mentioned that buffer logic for v2/v3/v4 are not compatible. It is obvious because of different FDTI-CPLD connections in different versions. But available downloads contain only v2 SVF files for JTAGkey and KT-Link. I found some v3 files intended for self-test, not for regular usage. Are these files available?
I have purchased v3c from Seeed Studio, successfully programmed self-test logic (BBV3-JTAGkey-selftest-v1.1.svf), connected the appropriate pins and saw the self-test successfully passed. Now I want to use BB for SPI flash programming as JTAGKey with UrJtag but don't know what SVF file should be used for CPLD programming.
I tried all SVF files I found here (BBv2-JTAGkey-v1.2.svf, BBv2-JTAGkey-v1.3.svf, BBv2-JTAGkey-v1.4-verilog.svf, bbv3_jtagkey.svf). Each of them is successfully programmed into CPLD but but none of them allow me to read STM25P05. In each try, UrJtag shows the same message:
Warning: TDO seems to be stuck at 1
If I disconnect the cable and connect TDO directly to Gnd or Vcc, UrJtag always shows the same message.
Since the self-test passes, it means that CPLD works and routes all needed signals between FTDI and the header. I'm afraid the problem is in v2 buffer logic that does not match v3.
Where to find v3 SVF files for v3?
Unfortunately, still no success. Tried to connect MX25L8005 flash IC, ran detection with buffers configured by various v3 SVF files found here but IC does not respond at all (TDO is not changed, watched with a scope). Changed frequency from 100000 to 1000000, no difference. TMS is asserted low, TCK produces a good clock signal, TDI shows short high level spikes but TDO is contantly at low level.
Saw a post (cannot insert the link because of a new account) where a guy used BB with JTAGKey buffer and UrJtag 0.10 to program ATMega169. In his case, UrJtag successfully communicates with the IC and detects Atmel manufacturer. So I connected a working USBASP board having ATMega8, shorting JP2 (self-programming mode). In such mode, I can successfully program the board with any AVR programmer. Being connected to BB, the board gets power, TMS assertion puts it to serial programming mode (TMS is connected to RESET), TCK/TDI produce their signals but TDO does not change at all, being at low level.
Tried AVRDUDE 5.11 that supports FTDI but it does not detect FT2232H under Windows. It is a known issue.
Self-test still performs fine if the buffer programmed by BBV3-JTAGkey-selftest-v1.1.svf.
I'm afraid v3 is less stable than v2. Many v3 users complain about interfacing problems but most v2 users have no problems.
I'm sorry for the issues, thanks for your report. The only difference between v2 and v3 is the shape of the PCB and the placement of a few clock pins. I've dug into it many times and can't find any issues, but will have a look again on current production hardware.
The quickest place to find the SVF files is right above this post at the top of the forum:
viewtopic.php?f=37&t=3993 (http://dangerousprototypes.com/forum/viewtopic.php?f=37&t=3993)
I'm unable to access google services in China so I cannot upload it to google code. We are setting up a private GIT server on our new box to solve this issue.
Thank you for explanation. So should BBV3-JTAGkey-selftest-v1.1.svf file work as a normal JTAGKey buffer while P28 is free and as a self-test buffer while P28 is shorted?
If yes, I think it would be better to update v3 description. In the self-test description chapter (http://http://dangerousprototypes.com/docs/Bus_Blaster_v2_manufacturing_resources#Hardware_selftest), there is the warning:
"We highly recommend users upgrade to a non-selftest buffer immediately."
So I thought there is a separate SVF file for normal usage.
Should UrJtag recognize BB's own CPLD on interface 0 if JTAG header is externally wired to JP1?
After three-day experiments and looking for software that can work with SPI targets via BB v3c, was able to read/write ATMega8 with avrdude (http://http://dangerousprototypes.com/forum/viewtopic.php?f=37&t=6725).
Unfortunately, flashrom 0.9.6.1-r1705-mingw with "-p ft2232_spi:type=busblaster" recognizes BB (channel A is converted to libusb device with inf-wizard) but does not detect and/or recognize MX25L8005 SPI flash IC. The IC is soldered to a self-made 10-pin SPI connector. Plugging this connector into USBASP 2.0, I can read and write the flash using AsProgrammer. Connecting BB to USBASP with another self-made cable, I can read and write ATMega8 on USBASP. Thus, all connections are made properly.
Don't know what works incorrectly, flashrom or BB.
-p ft2232_spi:type=busblaster
How about:
-p ft2232_spi:type=jtagkey
? As that is the buffer installed, and is widely supported.
[quote author="ian"]
How about:
-p ft2232_spi:type=jtagkey[/quote]
Tried that but flashrom complains "Unable to open FTDI device: -3 (device not found)." I'm afraid it tries to find native JTAGKey's VID/PID. In flashrom docs, I found no way to specify VID/PID for a device.
And "ft2232_spi:type=busblaster" (as well as "ft2232_spi:type=2232H,port=A") allows flashrom to recognize BB only if Serial Interface A device is converted to a libusb device.
Found that the main JTAGKey CPLD logic (BBV3-JTAGkey-selftest-v1.1.svf, 31080 bytes (http://http://dangerousprototypes.com/forum/download/file.php?id=7756)) found here (http://http://dangerousprototypes.com/forum/viewtopic.php?p=39971#p39971) has a problem with TMS signal delivery.
Initially, flashrom v0.9.6.1-r1704/Win32 could not detect MX25L8005 IC. With a scope, found that flashrom forms a bad clock signal, fixed it with -p ft2232_spi:type=busblaster,divisor=8. Clock signal became good and the IC started to be detected some times but not stable. Looking at all SPI protocol with a logic analyzer, saw that TMS is not asserted at all.
Tried another CPLD logic (bbv3_jtagkey.svf, 30416 bytes (http://http://dangerousprototypes.com/forum/download/file.php?id=10154)) from this post (http://http://dangerousprototypes.com/forum/viewtopic.php?p=52147#p52147) and TMS works fine, flashrom detects the IC in all cases, and successfully reads it.
Also tried two other CPLD logics (bbv3-jtagkey.svf and bbv3-passthrough.svf, 29894 bytes each (http://http://dangerousprototypes.com/forum/download/file.php?id=10911)) from this post (http://http://dangerousprototypes.com/forum/viewtopic.php?p=56358#p56358), both have TMS working good.
Since flashrom has exactly the same bitbang parameters for both "jtagkey" and "busblaster" (the only difference is USB PID), I'm afraid that self-test buffer configuration has a bug in TMS connection/activation.
BTW, AVRDUDE 5.11-Patch7610/Win32 works fine with ATMega8 on all four buffer configurations but complains about RESET line. AFAIK AVR programming can be performed with RESET line always low so it isn't a problem.
Does anyone have experience using Bus Blaster with OpenOCD? As best as I can tell---and without a scope---UrJTAG (DP "Rev. 11" / Windows 10) and OpenOCD are affected by the "stuck bitstream" issue across all of the buffers linked to in this thread. Self-check passes, target is a Olimex A20-OLinuXIno-LIME2 that I haven't been able to verify as a known-good target as of yet. :/
Wiring scheme follows: suggestions/corrections welcome.
A20 User Manual / Full Name / FEX Line (linux-sunxi)
PB14_SELECT 011 (mux 3) = JTAG_MS0 / JTAG Test Mode Select (TMS) / jtag_ms = port:PB14<3><default>
PB15_SELECT 011 (mux 3) = JTAG_CK0 / JTAG Test Clock (TCK) / jtag_ck = port:PB15<3><default>
PB16_SELECT 011 (mux 3) = JTAG_DO0 / JTAG Test Data Output (TDO) / jtag_do = port:PB16<3><default>
PB17_SELECT 011 (mux 3) = JTAG_DI0 / JTAG Test Data Input (TDI) / jtag_di = port:PB17<3><default>
Voltage target (VTG, input)
Bi-directional reset (TSRST, inout)
Signal / Bus Blaster JTAG Header / LIME2 (Rev. B) GPIO-3 Pin
TMS / 07 (TMS) / 26 (JTAG_MS0)
TCK / 09 (TCK) / 28 (JTAG_CK0)
TDO / 13 (TDO) / 30 (JTAG_DO0)
TDI / 05 (TDI) / 32 (JTAG_DI0)
VTG / 02 (VTG) / 03 (3.3V)
TSRST / 15 (TSRST) / 05 (RESET#)
GND / 04 (GND) / 02 (GND)
BB JP4: 3.3V->Target: Open
Digikey # SAM8665-ND + CSR20G-ND; all lines less than 2 inches long, no additional caps/resistors added