Is there a document showing how to do edge triggering, or otherwise use the advanced/complex triggers? I dug about, but only found low level stuff on SUMP communications.
Thanks
[quote author="PhotoKevin"]Is there a document showing how to do edge triggering, or otherwise use the advanced/complex triggers? I dug about, but only found low level stuff on SUMP communications.
Thanks[/quote]
I don't know of any docs that describe it, but it's pretty basic in any case. I don't have it in front of me, but from memory, if you want edge trigger, you do that with a sequence. Let's say you want to detect a negative edge on a signal as the trigger. The first state should look for that signal being a '1' and advance to the next state if it finds a '1'. The next state then looks for the signal to be a '0' and if it is, trigger acquisition.
I think that it would be nice for something as commonly needed as edge triggering, that there was a shortcut method to get it, rather than having to build it up via a sequential trigger. Sequential triggering is a very powerful and very advanced capability, but we shouldn't have to delve into it, just to get an edge trigger. Especially so when every commercial logic analyzer on the planet has edge trigger capability without making the user setup a sequence trigger. Unfortunately, not many of the people using the logic sniffer have much experience with the real professional grade ($100K+) logic analyzers that are out there. So, they don't recognize the many innovations that are present in such equipment, that don't actually cost any money at all to implement. The most commonly referred to pro-grade logic analyzer that folks are aspiring the logic sniffer to emulate is a 25 year old model that is light-years behind the current state of the art in features and usability.
There's tutorials in the manual:
http://dangerousprototypes.com/docs/Ope ... uick_Start (http://dangerousprototypes.com/docs/Open_Bench_Logic_Sniffer#Quick_Start)
Triggers are covered here:
http://dangerousprototypes.com/docs/Log ... l_triggers (http://dangerousprototypes.com/docs/Logic_Sniffer_102#Complex_parallel_triggers)
@qwlciguk - agreed, we are aiming to bring usable logic analysis to everyone for $50, not top of the line stuff. For software details, Jawi is really responsive and can quickly add anything you suggest into his client.
AFAIK, nobody has implemented support for advanced triggers in a SUMP client. Since edge triggers are really useful I decided to add it to the basic trigger mode in the verilog code as well as implement support for it in JaWi's SUMP client.
Here is a screen shot of the trigger setup menu with edge triggers. If the edge bit is set then the value bit means rising/falling edge, else it means high/low level. You can mix and match edge and level triggers.
(http://http://www.saanlima.com/images/edgetrigger.jpg)
See attached zip file with verilog source (bitfile in the XISE directory):
Here is a link to my version of JaWi's client that has support for edge triggers (too big to attach):
http://www.saanlima.com/download/ols-0. ... iggers.zip (http://www.saanlima.com/download/ols-0.9.8-edgetriggers.zip)
EDIT: I did an update to the files due to a bug with the edge triggers at lower clock rate.
Magnus