I have a desire to analyze a CAN bus. I was looking at the demo software for the Intronix LogicPort. They have a CAN interpreter that they use connected to the CANL line. From what I have found that will give you about 2.5v on the idle bus and about 1.1v for a dominate bit. It looks like they use a logic threshold of 1.6v (which is adjustable on the LogicPort) in order to analyze the bus. I have looked at the datasheets for the buffer and FPGA and am having a hard time getting a feeling for how this work work.
Any idea if this would work with the OLS? Is there a threshold that I could get with just a voltage divider? Any input or ideas would be appreciated.
Dean
You could use mcp2551 or similar to convert the differential CANH and CANL to TTL signal, and then sniff it.
That is true, I guess that I did not think about that. Thanks
But if you really want it simple, I think that voltage divider might work as well. You need to know the exact voltages of high/low thresholds, and try to fit the 2.5/1.1 volts to those values. (and of course some zener diode for protection)
I'm sure the mcp2551 would make nice wing for OLS :). And be careful - the mcp2551 has 5v output, not compatible with the FPGA IO.
Yes, so I just need to be sure to use the buffered inputs, right? You have got me nervous!
That would be a great wing. And then if we could get CAN plug-in for SUMP that would be awesome!
Yes use the buffered pins.
The CAN analyzer should be easy, It is just a giant state machine.