I'd like to get some help if I could please. I bought a Bus Blaster and 2 CPLD boards. I'd like to get some more products but having some reservations now because there's information all over the place. Windows 7, EeePC using UrTAG, jumper on jmp 4 with the Bus Blaster.
me: cable ft2232 interface=1
jtag> connected to libftd2xx driver.
Warning: TDO seems to be stuck at 0
me: svf c:/svf/bbv2/svf
Error svf: chain without any parts
As mentioned, the information you guys provide is rather convoluted and all over the place to include a dead link. Is there a quick fix for this? I'm sure I'm just making a small mistake somewhere. The jumpers on the jtag were set as linked somewhere which I now can't find because your information is all over the place (and wasting my time, honestly and I don't intend to be rude, there's really no excuse for this if you guys are selling a development tool). I get a proper test voltage on p19. Am I supposed to take this pin or any other to ground?
Thanks in advance!
I'm sorry about the problem and inadequate documentation. There is a ton of information in the wiki and it can be really intimidating.
First, what are trying to do? Program a buffer into the on-board CPLD, or communicate with one of the CPLD boards?
If you are trying to program a buffer you'll need to check out the instructions here, make sure you compile the latest urJTAG or use our hacked .exe:
http://dangerousprototypes.com/docs/Bus ... rogramming (http://dangerousprototypes.com/docs/Bus_Blaster_v2_buffer_logic#Programming)
If you're trying to program the CPLD boards (which version?) I suggest this tutorial from the CPLD board documentation:
http://dangerousprototypes.com/docs/CPL ... _SVF_files (http://dangerousprototypes.com/docs/CPLD_programming_with_Bus_Blaster,_urJTAG,_and_SVF_files)
Just for reference, here's the CPLD board documentation and introductory tutorials:
http://dangerousprototypes.com/docs/CPL ... ic_devices (http://dangerousprototypes.com/docs/CPLD:_Complex_programmable_logic_devices)
Here's the Bus Blaster home page:
Well, I've spent over 6 hours following every thing just trying to read the programmer and a CPLD board. Self tests gives either 5, 11, 12 or 13 errors.
Right now I get nothing but errors with urJTAG trying to "detect" after typing "cable ft2232 interface=1" I get these flush errors. "bsdl path c:/bsdl" gives a detect of "TDO seems to be stuck at ". "svf c:/svf/bbv2.svf" actually worked one time.
Connected to libftd2xx driver isn't a problem.
With a CPLD wired in to the programmer, cable jtagkey then detect gives no response as does bsdl path c:bsdl for detect. And yes, I've been careful which way the / goes.
So, do you guys honor warranties? I like the little CPLD boards, which runs the code already on them, but after this first experience with your company I think I'll look else where for a JTAG programmer. I'll even pay for shipping.
I'm sure Seeed Studio will give you a refund or replacement, please contact them. I'm sorry again about your experience.
Self tests gives either 5, 11, 12 or 13 errors.
Can you please post the output of the self test? It is run on every board before it is shipped. Is the CPLD in test mode with the LED on? Do you have the jumpers between pins? I'd really appreciate it, this design is really reliable and if there is a problem we're happy to replace it.
Yes, the green light was on. Here it is with 3 errors- it's not even consistent in the errors.
So, should I just give this link to Seeed Studio and discuss getting another board or refund? I'm rather frustrated but do appreciate you trying to help me. There's a dedicated Xilinx JTAG programmer for $100 I'll probably get and have had no problems with Xess FPGAs boards which don't require a programmer. The CPLD boards, which I plan on buying more of, is for glue logic for a small FPGA cluster.
Thanks for posting the picture, its clearly broken hardware. Please contact Seeed and reference this thread for a replacement or refund.
Thank you Ian. I emailed them early yesterday morning, have not heard from them yet. I understand it could take a few days. Here's what was sent to include the order number and itemized items in the email they sent when I purchased the items: (edit- and I did link to here)
Ian from Dangerous Prototypes sent me here. When I got around to using your product for using CPLDs as glue logic for small FPGA clusters, after wasting +10 hours trying to even read the board the Bus Blaster V2.5 is obviously defective. This is my first time dealing with Dangerous Prototypes or Seed Studio and my confidence with these 2 companies is rather shaken at this point. I would like to get a refund and take my business elsewhere for programmers. I don't know how well these are being tested but even the self test errors are not consistent which could be a sign of a bad solder joint. Reading through the Dangerous Prototypes forum, I notice other people have had problems with solder joints in the past.
I need to do rapid prototyping, which is why I use the Xess FPGAs boards, and it's obvious that I need something of higher quality for CPLD programming without worrying about if the programmer is going to be reliable or not. Time is money and my time has been burned by you product.
I do, however, like the form factor of the CPLD boards, their self test worked and will likely get more of them assuming they don't also have bad solder joints when I can actually test them. Ian has been quite courteous and professional.
Your post should have never been made public ...
Seeed will be happy to replace or refund your board, but please direct your criticisms to me. I am responsible for the hardware here, they just manufacture and sell it for us. I'm sorry you feel like your time was wasted.
Every single board Seeed Studio sells for us passes the complete self-test before it ships. That said, problems do slip by and happen in transport, and we are happy to replace hardware no questions asked. Out of a batch of 1000 Bus Blaster boards there maximum 1 or 2 boards that are delivered broken, that's just a fraction of a percent and quite excellent.
On this board I have to assume electrical damage due to the inconsistency of errors. If you return it (I doubt Seeed will ask so it is optional), you can bet I will have them send it on to me for a complete investigation to figure out exactly where the failure is.
Again, I'm really sorry you received a defective board, wasted your time, and have a bad impression of us and Seeed Studio. Please confine your criticism to me though, Seeed does excellent work for us.
You told me to contact Seeed Studio for a refund and to link to here. That's exactly what I did. If they are on the manufacturing end then they share a responsibility for quality control and my criticism is well placed.
I'll be contacting them again since I haven't heard back.
And to answer another post, things like this should be made public. There are other posts about quality control, one person even had to rework a board with a hot airgun, and the lack of centralized information.
I got my Bus Blaster today, and I'm also experiencing this error.
I'd like to point out that whenever the wiki instructs you to install the modified urjtag exe, or to run a self-test .bat, it does not actually link to anything.
After some time I found these all on svn. Also xc2c32a.bdsl, which was well hidden in:
(EDIT: after writing this I've found the main package with urjtag and .bsd, which is nice).
Anyways, in my case self-test was okay, so maybe the error is normal and there is something wrong with my target connection (LPC1769)
jtag> cable ft2232 interface=1
Connected to libftd2xx driver.
IR length: 8
Chain length: 1
Device Id: 00000110111000011100000010010011 (0x06E1C093)
jtag> cable jtagkey
Connected to libftd2xx driver.
discovery.c:117 urj_tap_detect_register_size() Warning: TDO seems to be stuck at
EDIT: after various voodoo rituals, it's now working (I think). So false alarm from me.
I am having, I believe, the same problem as you. Please see my post: viewtopic.php?t=6058&p=55865 (http://dangerousprototypes.com/forum/viewtopic.php?t=6058&p=55865)
My board passes self-test and also programs the internal buffer normally, so I am not sure where to look anymore.
If you could share some of the "voodoo rituals" you used I would be grateful.
Cheers (and happy holidays),