cool i received my cpld board few days ago and i didn't had time to play with it, so tonight i put on header and install Xilinx IDE :-)
i open an example, compile it and i went digging in old boxes to look for my old xilinx clone parallel cable ... darn i don't have a parallel port on my pc, and the old cable is not recognize by my usb-parallele adapter...
so i thought time to try the JTAG programmer for the BusPirate ...
so with the help of beers .... success !!! it works fine ! :-)
i only have a question ... i didn't used the power from the BP, but i let the board V+ connected ...
i used V+ = 3.3volt and it works fine .... the wiki page said power should by BP 3.3V or 5V on V+pin.
is it a problem to used 3.3v on V+ pin ?
now my problem is i need to reflash my BP to use it in standard mode each time ...
darn no busblaster in stock when i ordered my cpld board, i 'll need one for sure (or another BusPirate).
:o)
i only have a question ... i didn't used the power from the BP, but i let the board V+ connected ...
i used V+ = 3.3volt and it works fine .... the wiki page said power should by BP 3.3V or 5V on V+pin.
is it a problem to used 3.3v on V+ pin ?
I'm glad it worked, thanks for the update.
It really doesn't matter how you connect the power, as long as you don't connect the Bus Pirate 5volt supply to the 3.3volt JTAG header pin :)
With 3.3volt or 5volts on V+ (from Bus Pirate or another supply) the little regulator on the CPLD board makes 3.3volts (or a bit lower with 3.3volts attached).
The other option is to bypass the on-board regulator and connect the Bus Pirate 3.3volt supply to the 3.3volt JTAG header pin. Then the Bus Pirate supplies the CPLD instead of the on-board regulator.
It is best to connect only one power supply (Bus Pirate 3.3volt to JTAG -OR- a supply on V+ pin for the on-board regulators).