Hello,
I'm looking to learn CPLD (I ordered both cpld boards from Seeed), but I didn't find "cool" books. I really find only books that focus more on boolean algebra than on applications.
I understand that CPLD/FPGA are more on logic combinations, but books are not that cool to read. Almost all books have been written by engineers for engineers, and electronic is not my daily job, so I find them somwhat ennoying.
I found this kit http://www.xgamestation.com/view_product.php?id=40 (http://www.xgamestation.com/view_product.php?id=40) it's based on MACH CPLD, and when I check the sample chapter provided, the book is really very explainfull, but the kit is a bit expensive if we take into account that the book is **not** provided in hard paper format.
Do you know of any similar book, good and instructive that I can use to learn CPLD? (not necessarily those on the DP boards, I can do needed adaptations of codes).
I don't know about books, but I found the website fpga4fun.com to be informative. A CPLD is essentially a simple version of a FPGA and the same tools and concepts apply.
What kinds of projects interest you? Maybe I can whip up some demos for the dev boards in those areas.
Hi ian,
I'm mainly interrested by vga and PAL signals generation. I think I'm going to buy this book
http://www.digilentinc.com/Products/Det ... rod=LBE-DD (http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,729,746&Prod=LBE-DD)
I'm checking on the web about the choice of the language, I don't know if I have to go VHDL or Verilog (the choice is not easy). I may order today a Nexys2 FPGA Board 500K board with it. This will make learning quicker I think.
I've done a couple projects in both, and I highly prefer Verilog. Both have about the same syntax for a lot of stuff so learn one and get the other for free, but VHDL won't hesitate to make some things more complicated. Verilog is more C like, including stuff like commenting (/) and block comments (/*...*/) that are not available in VHDL (-- single line only).
Yes I saw a lot of posts about both on the web, and they all said that:
- Verilog is more relaxed language, more C like language.
- VHDL is more ADA (or Pascal) like language, strongly typed, and more constraining. But VHDL, with its typing system, makes it possible to define your own types, where Verilog keep you confined to language base types.
Anyway, I'll go Verilog (VHDL will wait).
Regards