I'm interested in programming a CPLD (Coolrunner-II or Altera EPM3064ALC44-10) with a microcontroller (Arduino or Netduino). The idea is to load custom logic on demand in the field.
There are posts around the internet that this is possible (just have to interface with the JTAG connection) but I haven't found working code. I'll be looking into this once the summer starts but wanted to find out if anyone has seen a working implementation or is interested in working on this.
Ofcourse, after posting I found this Xilinx application note, XAPP058.
Xilinx In-System Programming Using an Embedded Microcontroller
The CPLD/FPGA designs are processed into a XSVF File. (Xilinx?) Serial Vector Format. This can be stored in memory on the PCB and then an XSVF interpreter on the processor feeds the configuration over JTAG. The files aren't prohibitively large, <= 1MB even for large devices.
There's a reference C design for an XSVF Interpreter so I'll be starting there.
I can't post links yet so sorry about the format.
www (dot) xilinx (dot) com/support/documentation/application_notes/xapp058.pdf
https:// secure (dot) xilinx (dot) com/webreg/clickthrough.do?cid=113970&license=RefDesLicense
Hmm, i though I did post a reply pointing to this app note.. Prolly it got lost in a reboot :)
We use this app note to make a special firmware for the buspirate in order to program the recently released cpld boards. It is very easy to port it to a different platform, IIRC you only need to port one C-file to the specific platform. I dunno if your specific cpld is supported by XSFV..
BTW. after a day after the first post you should be able to post links and pictures.
XAPP058 is very nice and has worked with everything I throw at it.
Here's the wiki for the Bus Pirate version:
http://dangerousprototypes.com/docs/Bus ... SVF_player (http://dangerousprototypes.com/docs/Bus_Pirate_JTAG_XSVF_player)
There is a converter utility for industry-standard SVF formats:
http://dangerousprototypes.com/docs/JTA ... _converter (http://dangerousprototypes.com/docs/JTAG_SVF_to_XSVF_file_converter)
Here is our port in SVN. I contacted Xilinx support and they said the license is do what you want, no warranty. (BSD I guess...):
http://code.google.com/p/the-bus-pirate ... svf-player (http://code.google.com/p/the-bus-pirate/source/browse/#svn%2Fxsvf-player)
Thanks for the links. I'm glad I didn't go off and reinvent the wheel from scratch.
Be sure to note that CPLD has limited number of program erase cycles. Something like 1000. (ds090.pdf page 14)
Robots: The final target is a chip more along the lines of a Spartan 3, with an Npe of >= 10k cycles. CPLDs are just a start, cheaper chips. Even for 1000 cycles though, that still lets you have some fun. Thanks for the heads up though, I had the number from FPGAs in my head and forgot to look at the number for CPLDs.
number for FPGAs is ... unlimited :-) , unless you are using some spartan with internal flash
BTW if you look at opencores.org, there are some projects where FPGA configuration is saved on sdcard/spi flash and microcontroller uploads the configuration at startup. It is based on 8051, but written in C. It should be pretty straight forward to port to other mcu.
Will I never learn. Saw this summary:
The 1.2V Spartan -3 family of Field-Programmable Gate Arrays is ... Endurance of 10000 program/erase cycles. - Program/erase over full commercial voltage ...
on a google search result on a Xilinx.com page and didn't even think to look at the full context. They're talking about the XC9500.
I've been porting the XAPP058 code over to an arduino, hopefully I'll be able to load configurations from an SD card or over ethernet in two weeks once exams are over.