I notice the CoolRunner-II breakout board has provision for a 5x7mm oscillator package on the back side. My design requires a clock source, so I was planning to populate this part. However, the below Xilinx note gives me some concern, since the clock would be running whenever +3.3V is applied. Do I need to break the path feeding my clock signal into CPLD pin 1 whenever I want to re-program? Or, when programming there is only power on the VDD_AUX on the JTAG connector, and not enough leaks into the Vcc pin so the external clock chip would not be running anyway during JTAG programming?
"If free running clocks are delivered into a Boundary-Scan (JTAG) device, it can be necessary to disconnect or disable their entry into these devices during ISP or Boundary-Scan (JTAG) operations."
p.14, "Configuration Checklist"
http://www.xilinx.com/support/documenta ... app501.pdf (http://www.xilinx.com/support/documentation/application_notes/xapp501.pdf)
The OSC is connected to the bank V1 power supply, so you could definitely remove the jumper and it would be unpowered. JTAG is supplied through an individual pin that is (for our board) fixed at 3.3volts.
I have not tried it with our board yet, but I have a Digilent dev-board on my desk that I use with OSCs. It has a 9572XL VQ44 (same as ours) and XC2C256 in tqfp144 (bigger coolrunner-II).
Both chips are connected to a 1.8432MHz OSC. It can be disconnected by a jumper, but I have never done so when using the board. I've done all sorts of demos and tests with it without a problem. That doesn't mean it isn't a problem though :)
In practice though, I doubt many in-system reprogrammable devices have a configuration where the clock can be removed during programming. Could be horrifically wrong ;)
Whenever you are reprogramming all the IO pins are Hi-Z, so i would guess that there is no problem with reprogramming.
"If free running clocks are delivered into a Boundary-Scan (JTAG) device, it can be necessary to disconnect or disable their entry into these devices during ISP or Boundary-Scan (JTAG) operations."
This is related to free running clock on the jtag, not the external oscilator