Title: Assembled CPLD breakout board pictures
Post by: ian on February 16, 2011, 04:36:37 pm
Post by: ian on February 16, 2011, 04:36:37 pm
Here's the assembled XC2C64A and XC9572XL breakout boards.
A trace broke on the XC2C when we renamed a pin connected to the button. A tiny break, but enough to keep it from working. The jumper wire connects the button to the correct pin. This was easily fixed on the production boards without a second revision.
A trace broke on the XC2C when we renamed a pin connected to the button. A tiny break, but enough to keep it from working. The jumper wire connects the button to the correct pin. This was easily fixed on the production boards without a second revision.
Title: Re: Assembled CPLD breakout board pictures
Post by: sqkybeaver on February 16, 2011, 07:33:35 pm
Post by: sqkybeaver on February 16, 2011, 07:33:35 pm
looks good assembled
Title: Re: Assembled CPLD breakout board pictures
Post by: Bustar on February 16, 2011, 11:53:55 pm
Post by: Bustar on February 16, 2011, 11:53:55 pm
Dandy. They look like very modern breadboards.
Title: Re: Assembled CPLD breakout board pictures
Post by: rsdio on February 17, 2011, 12:13:57 am
Post by: rsdio on February 17, 2011, 12:13:57 am
By the way, how did you settle on the width for this board? Obviously, the length was determined by the number of 100-mil holes. Did you try narrower or wider versions and look at how the routing turned out?
Also, did you consider mounting the Xilinx at a 45 degree angle? I've seen this technique, and it's easy enough in Eagle, I just wonder how people decide when to break away from the more typical 90 degree placement.
Also, did you consider mounting the Xilinx at a 45 degree angle? I've seen this technique, and it's easy enough in Eagle, I just wonder how people decide when to break away from the more typical 90 degree placement.
Title: Re: Assembled CPLD breakout board pictures
Post by: ian on February 17, 2011, 07:39:33 am
Post by: ian on February 17, 2011, 07:39:33 am
The width is the closest 0.1" centers (based on the pins on either side) to the smallest size we could route the PCB. I may have kicked it out a little wider than it needs to be because I wanted the nice labeling, but that is probably not enough to get down to the next smaller 0.1" center.
We're using 45degree placements occasionally, but on this chip the two IO banks are split right down the middle. To keep each side of the breakout a separate voltage bank (for eg level translation) I thought this was the best option.
We're using 45degree placements occasionally, but on this chip the two IO banks are split right down the middle. To keep each side of the breakout a separate voltage bank (for eg level translation) I thought this was the best option.