Dangerous Prototypes

Dangerous Prototypes => Bus Pirate Support => Flashrom => Topic started by: biosflasher on November 17, 2009, 01:43:07 am

Title: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 17, 2009, 01:43:07 am
Hi,

I noticed that the Bus Pirate is being used by some people to read/write BIOS flash chips (the SPI variant). It seems that everyone is writing their own code to support these flash chips, and the incompatibilities between various chips on the market make reusing the code difficult.

The flashrom project (http://http://www.flashrom.org/Flashrom) has support for quite a few programmers and hundreds of flash chips and runs under Linux/OSX/*BSD/Solaris/Windows. It seems quite a natural fit to add Bus Pirate support to flashrom. The FT2232H-based SPI support (http://http://www.flashrom.org/Flashrom/FT2232SPI_Programmer) in flashrom may provide a good starting point for Bus Pirate support. flashrom is open source (GPL). The flashrom developers are friendly, and patches are merged pretty rapidly.

flashrom is a command-line utility, but it is non-interactive, so anyone wanting to wrap a flashrom + Bus Pirate instance with a GUI (or some script) can do so easily.

What do you think? Anyone up for such a project?
Title: Re: Adding Bus Pirate support to flashrom?
Post by: audiohacked on November 17, 2009, 08:17:29 am
Coreboot and flashrom was one of the reasons I got a Bus Pirate. I would welcome it if someone would start work on this.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on November 17, 2009, 08:33:18 am
That sounds great. Let me know if I can help.

There's also support for the Bus Pirate in AVRdude SVN, I think AVRdude programs several different EEPROMs too.

Here's the binary mode documentation:
http://dangerousprototypes.com/2009/10/ ... bang-mode/ (http://dangerousprototypes.com/2009/10/09/bus-pirate-raw-bitbang-mode/)
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 17, 2009, 10:49:41 am
Hm. The binary SPI mode has a few possible limitations which could result in unreliable flashing due to timing issues. I'm sorry if I just misunderstood the protocol. The issues and my questions are listed below.


The general command structure used by flashrom is basically:
Simplest case, if you can guarantee absence of delays and if command length doesn't exceed one bulk transfer size: Enable CS, Send bulk (and read result), Disable CS.
If you can guarantee there are no delays: Enable CS, Send bulk (and read result), Send bulk (and read result), Disable CS.
If there may be delays: Enable CS, Send bulk (and read result), Enable HOLD, (delay), Disable HOLD, Send bulk (and read result), Disable CS.

Typical command lengths are 1, 2, 4, 5, 6, 12, 20, 68, 132, 260 bytes. Command lengths above 6 are usually not essential, but given the overhead of some of these commands, flashrom uses as large command lengths as possible. With the current Bus Pirate protocol, it seems there is a sweet spot at command length 12 (which is the length of e.g. an 8-byte flash write or an 8-byte flash read).

Oh, and is there some bounty for this? :-D
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on November 17, 2009, 11:16:00 am
1. Don't know about auto CS handling. Can you give me a datasheet link for a chip with timing issues so I can see what we're up against?

2. Hold can be done with the AUX pin, which can be toggled in any raw mode.

3. Yes, it sends the bytes as they arrive and responds with a bus read for each byte sent.

4. Could probably add a batch mode using the ring buffer.

5. Unsupported commands get reply 0x00, supported commands respond 0x01. What extra commands would you need?

Quote
If you can guarantee there are no delays: Enable CS, Send bulk (and read result), Send bulk (and read result), Disable CS.
If there may be delays: Enable CS, Send bulk (and read result), Enable HOLD, (delay), Disable HOLD, Send bulk (and read result), Disable CS.

How much of a delay is too much? The next send bulk begins one UART byte period after the previous SPI byte (eg bulk command + data, bulk command + data). There's not other SPI bus activity during that period. Do flashrom chips have a timeout? You should be able to send any command length using multiple bulk transfers. I think I'm missing some key part of the way that these eeproms work.

If you get it implemented and compiled I'll send you this months project ;)
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 18, 2009, 02:08:56 pm
[quote author="ian"]
1. Don't know about auto CS handling. Can you give me a datasheet link for a chip with timing issues so I can see what we're up against?[/quote]

Sorry, I don't remember the chip which had such problems. According to the datasheets, there is no max time between enabling CS and the first clock, but I am pretty sure I saw problems in practice. It was a SST25VF or MX25L chip IIRC. Then again, it could have been an interaction with other timing issues.

Some chips (e.g. the MX25L512) have a minimum clock frequency of 1 kHz, and usually these chips have 40%/60% min/max duty cycle, so you could deduce from these constraints that the time between CS enabled and the first clock should be no more than 0.6 ms. Datasheet: http://www.syncmos.com.hk/PDF/MXIC/MX25L512ver13.pdf (http://http://www.syncmos.com.hk/PDF/MXIC/MX25L512ver13.pdf)

[quote author="ian"]
2. Hold can be done with the AUX pin, which can be toggled in any raw mode.
[/quote]

Neat, I thought AUX would be reserved for something else.

[quote author="ian"]
3. Yes, it sends the bytes as they arrive and responds with a bus read for each byte sent.
[/quote]

Ah hm. Well, then I misunderstood some part of the Bus Pirate protocol. Or do I still not get it? I thought it would be possible to at least send the bulk transfer in one USB packet so there are no delays between bytes, and get one bulk packet with the answer back. If even the bulk transfers are one-USB-packet-per-byte, the host scheduler may kick in in the middle of a transfer, cause a >0.6 ms delay (the delay will likely be in the >4 ms range for a Linux machine with HZ=250), and chip behaviour will be unpredictable.

[quote author="ian"]
4. Could probably add a batch mode using the ring buffer.
[/quote]

That would be awesome. How big is the ring buffer?

[quote author="ian"]
5. Unsupported commands get reply 0x00, supported commands respond 0x01. What extra commands would you need?
[/quote]

Ring buffer management:

With ring buffer management, and the already existing AUX functionality (which I'd use for HOLD), I don't need anything else (no auto-CS stuff, no auto-HOLD stuff, nothing).

I could test ring buffer management presence before using it. The great thing in your protocol design is that unsupported commands are defined to do nothing (and return 0x00). I'm used to "unsupported/undocumented commands will result in undefined behaviour, which may not even be fixable with reset" from too many datasheets. That's why I asked.

[quote author="ian"]
Quote
If you can guarantee there are no delays: Enable CS, Send bulk (and read result), Send bulk (and read result), Disable CS.
If there may be delays: Enable CS, Send bulk (and read result), Enable HOLD, (delay), Disable HOLD, Send bulk (and read result), Disable CS.

How much of a delay is too much? The next send bulk begins one UART byte period after the previous SPI byte (eg bulk command + data, bulk command + data). There's not other SPI bus activity during that period. Do flashrom chips have a timeout? You should be able to send any command length using multiple bulk transfers. I think I'm missing some key part of the way that these eeproms work.
[/quote]

Yes, the 0.6 ms delay mentioned above. Not all chips are affected, and not all chips really exhibit worst-case behaviour. That's the reason why we rarely see it in practice.

[quote author="ian"]
If you get it implemented and compiled I'll send you this months project ;)
[/quote]

The populated christmas tree? Deal.

I will need someone to test this on hardware, though, as I don't have a Bus Pirate (yet). AFAICS audiohacked has both such serial chips and a Bus Pirate, plus he's interested in getting this going.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on November 18, 2009, 02:24:26 pm
Quote
I thought it would be possible to at least send the bulk transfer in one USB packet

That's all driver level stuff, I'd say don't depend on it to be consistent because of versions, user settings, OS differences, etc.

The ring buffer is 4096bytes.

Let me look at the command sets and see if there's a consistent command we can use throughout for start buffer, end buffer.

Do you have Bus Pirate hardware on the way?
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 19, 2009, 02:10:41 am
[quote author="ian"]
Quote
I thought it would be possible to at least send the bulk transfer in one USB packet

That's all driver level stuff, I'd say don't depend on it to be consistent because of versions, user settings, OS differences, etc.
[/quote]

Even more reasons to be able to batch a few commands in the ring buffer. That essentially eliminates all those hardware/software differences.

[quote author="ian"]
The ring buffer is 4096bytes.
[/quote]

Woah. 20 on-the-SPI-wire bytes in the ring buffer (plus two CS changes) would already be enough for me. 260 on-the-SPI-wire bytes is maximum useful for writing classic NOR flash, <300 for classic NAND flash. Reading has no max size, almost every SPI flash chip (25L series) can do full-chip read in one single stream. So if buffer length management gets easier by restricting the number of commands/bytes in a transaction to an 8-bit (or even 7-bit) quantity, that's still way more than what I hoped for and definitely good enough.

[quote author="ian"]
Do you have Bus Pirate hardware on the way?
[/quote]

Not yet. I'm currently working on final university exam preparation, so I thought I'd postpone buying to a time when I have time+money to play with this.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: audiohacked on November 20, 2009, 05:29:48 am
biosflasher, have you been in contact with the Coreboot/Flashrom developers?

Depending on what you want to do, you can submit the patches directly to the Coreboot/Flashrom people, or send them to me and I can test and sign off on the patches and hopefully get them into the flashrom repository.

I've actually contributed to flashrom and coreboot previously.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 20, 2009, 08:58:28 am
[quote author="audiohacked"]
biosflasher, have you been in contact with the Coreboot/Flashrom developers?
[/quote]

Yes.

[quote author="audiohacked"]
Depending on what you want to do, you can submit the patches directly to the Coreboot/Flashrom people, or send them to me and I can test and sign off on the patches and hopefully get them into the flashrom repository.

I've actually contributed to flashrom and coreboot previously.
[/quote]

Great. I'll send them directly to the flashrom mailing list (http://http://www.flashrom.org/mailman/listinfo/flashrom). Are you subscribed there or should I CC you? I'd appreciate reviews/tests (and if everything is OK, an ack) from you.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 20, 2009, 05:26:53 pm
Status update:
Completed:
Missing is:

275 line patch so far.

Does anyone know if someone else already wrote C code for Bus Pirate Raw SPI mode initialization (and for establishing a connection to the Bus Pirate)?
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on November 20, 2009, 05:30:42 pm
Audiohacked's GUI has C++ code:
http://code.google.com/p/the-bus-pirate ... sPirateGUI (http://code.google.com/p/the-bus-pirate/source/browse/#svn/trunk/scripts/BusPirateGUI)

There's also Jame's I2C EEPROM in plain C:
http://code.google.com/p/the-bus-pirate ... EPROMWIN.c (http://code.google.com/p/the-bus-pirate/source/browse/trunk/scripts/I2CEEPROMWIN.c)

I can also help you with any initialization stuff you need.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 21, 2009, 02:42:44 am
[quote author="ian"]
Audiohacked's GUI has C++ code:
http://code.google.com/p/the-bus-pirate ... sPirateGUI (http://code.google.com/p/the-bus-pirate/source/browse/#svn/trunk/scripts/BusPirateGUI)

There's also Jame's I2C EEPROM in plain C:
http://code.google.com/p/the-bus-pirate ... EPROMWIN.c (http://code.google.com/p/the-bus-pirate/source/browse/trunk/scripts/I2CEEPROMWIN.c)
[/quote]

Thanks, I took a look. It seems that the C implementation is specific to Windows and the C++ implementation uses a rather largeish library mostly specific to Linux/Unix. Still, the code was valuable for deciding on the best abstraction model (or rather a model that does not suck).

I noticed that the C/C++ implementations always send 20 times 0x00 to enter binmode, but the Perl implementations send 0x00 and check the response. If there was a response they enter raw SPI mode, if there was no response they repeat the process up to 19 times.

[quote author="ian"]
I can also help you with any initialization stuff you need.
[/quote]

Thanks for the offer, I may get back to it later. Right now I'm trying to finish a patch which looks not totally stupid, and I'll post my progress here.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 21, 2009, 05:56:38 am
OK, I have a patch which compiles and should work. http://patchwork.coreboot.org/patch/572/ (http://patchwork.coreboot.org/patch/572/)
audiohacked is in CC of that mail in case he isn't subscribed to the flashrom list.

Usage:
flashrom -p buspiratespi:dev=/dev/ttyUSB0 -V
Replace /dev/ttyUSB0 with the device node of your Bus Pirate.
-V means verbose output, very useful to debug if something goes wrong.

P.S. Yes, the code sucks in some areas, but it should be good enough for testing.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on November 21, 2009, 09:33:44 am
Quote
I noticed that the C/C++ implementations always send 20 times 0x00 to enter binmode, but the Perl implementations send 0x00 and check the response. If there was a response they enter raw SPI mode, if there was no response they repeat the process up to 19 times.

I may take 1 or 20 0x00 to enter bin mode. If you're already in binmode you'll get BBIO1 after 1 x 0x00, if you're in user terminal mode then it'll take 20 x 0x00. There's a lot of ways to handle this, but I usually just blast 20 0x00 and then read the first 5 chars for BBIO1, and flush the serial buffer to get rid of any extra data (see the fast entry function in my newer Perl examples like the self test script).
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 21, 2009, 12:30:42 pm
SPI configuration initialization was incomplete, but audiohacked thankfully added that and we may get this committed soon.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on November 21, 2009, 12:46:58 pm
Great work! Keep me updated, I might have an extra Bus Pirate in a few days that I can send you for testing when you've got things going.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 21, 2009, 04:38:47 pm
I have posted a few flashrom infrastructure patches to make sure Bus Pirate support doesn't have any unwanted dependencies. Depending on reviews of those patches, Bus Pirate support may be committed this weekend.

Right now lots of stuff (speed, settings) is hardcoded, but the infrastructure to make that confgurable is already present.

Chip write is using the generic write function (on-the-wire overhead factor 5), not the fastest possible variant (on-the-wire overhead factor 1.344) because the generic function demands less of the programmer. Once we are sure everything works, fast write support is a matter of ~20 LOC. Fast read is already implemented (overhead factor 1.5), and changing it to maximum efficiency (overhead factor 1.344) is just a matter of testing 16-byte transfer reliability and changing a single integer constant.

If we get transaction support in the Bus Pirate, we can reduce read/write overhead to a factor of 1.0156 for the majority of the supported chips (some don't support low overhead writing).

I'll report back once this is committed or once we have the first successful identify/read/write (whichever happens first).
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 24, 2009, 01:27:34 am
Bus Pirate support was committed to flashrom in revision 772. Patch tracker entry: http://patchwork.coreboot.org/patch/584/ (http://http://patchwork.coreboot.org/patch/584/)

Thanks go to audiohacked for providing the SPI mode configuration (speed, polarity, ...) code and for testing flashrom.

AFAICS it should be possible to use flashrom with a Bus Pirate on all of Linux/*BSD/MacOSX.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 24, 2009, 01:43:08 am
I should add that SPI speed is hardcoded to 8 MHz right now and that Bus Pirate support is not yet mentioned in the man page.

Usage hasn't changed since I last mentioned it, but here it is again:
Code: [Select]
flashrom -p buspiratespi:dev=/dev/ttyUSB0 -V
Replace /dev/ttyUSB0 with the device node of your Bus Pirate.
-V means verbose output, very useful to debug if something goes wrong.

For read/write/erase commands please consult the flashrom man page.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 24, 2009, 02:08:03 pm
A patch has been posted to speed up reading to maximum efficiency possible without transaction mode, and Bus Pirate SPI speed is now selectable on the command line.
Code: [Select]
flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/ttyUSB0
The man page is explaining Bus Pirate support as well.

The current flashrom tree already supports all actions (probe/read/erase/write) on a Bus Pirate and the patch mentioned above is mainly cosmetic.

This project is completed.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on November 24, 2009, 02:09:36 pm
Wow, awesome job. Congratulations, I'll email you about an address for the bounty.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on November 24, 2009, 09:48:25 pm
Final flashrom patch committed in revision 776.

If anyone is using flashrom with the Bus Pirate, please give me a shout about whether it works for you on Linux/*BSD/MacOSX/Solaris.
By the way, I heard rumors someone wants to work on flashrom + Bus Pirate support for Windows (needs some serial code changes in flashrom). No detailed info so far.

Ian, thank you for the bounty!
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on December 01, 2009, 05:13:07 pm
Thanks for the blog entry, Ian!

We plan to package a release (0.9.2) of flashrom version with Bus Pirate support before Christmas and will of course advertise this big new feature. In the past it was difficult to do SPI flashing with a cheap programmer, but now I'm happy to tell people to use the Bus Pirate.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: dvbguy on December 09, 2009, 04:32:16 am
its a good thing as long as there is a windows version.  flashrom looks like a great project, but a majority of people running aroud with laptops use some form of windows.. not linux, or mac osx
until there is a new windows version of flashrom SPI flashing should not be removed or disabled from other projects..
Title: Re: Adding Bus Pirate support to flashrom?
Post by: audiohacked on December 09, 2009, 05:15:40 am
There's always the perl/python/window-c scripts you can use. I'm still in the process of internally redesigning the SPI interface in BusPirateGUI. And honestly I don't see much reason for BusPirateGUI to have any kind of explicit flashing support. Because I don't want to start a supported flashchip database for the BusPirateGUI, which would be recreating what flashrom already does for every Operating System except for Windows.

You're more than welcome to contribute a Windows port of flashrom, but I don't know how you are going to be able to support XP, Vista, and Windows 7; there are many other methods that you can use.

And SPI Flashing didn't even work in BusPirateGUI.

PS If you were talking about BusPirateGUI. Also there isn't an official version of flashrom for windows. Also, I don't do windows programming otherthan as a last thought, and because it's just a huge PITA.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: Shadyman on December 16, 2009, 12:50:40 am
Whoa! Good job! This was definitely something I was looking for... Actually, I was trying to find my USB to UART programmer so I could start BIOS hacking on my EEEPC, but now it seems that I can use my BusPirate for it :D

Thanks again, BusPirate community!
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on December 24, 2009, 01:30:48 am
[quote author="dvbguy"]
its a good thing as long as there is a windows version.  flashrom looks like a great project, but a majority of people running aroud with laptops use some form of windows.. not linux, or mac osx
until there is a new windows version of flashrom SPI flashing should not be removed or disabled from other projects..
[/quote]

Oh, there is a somewhat outdated patch for flashrom with Windows support created as a proof of concept hack, but the developer of that piece of code lost interest (he uses Mac OS X exclusively) and there was not even a single request for Windows support from any user in the last 12+ months.
Heck, the flashrom project got even a request for Haiku (BeOS clone) support in the last few weeks and that particular project may be finished before end of January 2010.

With zero users interested in flashrom for Windows and zero people willing to test, it is quite hard to do development (no feedback means developers will lose interest). This will of course change if someone is willing to test any Windows code. If you're really interested in compiling the code and testing it (together with maybe a dozen patch iterations), join the flashrom mailing list (http://http://www.flashrom.org/Mailinglist) and tell the developers that you're willing to test with a Bus Pirate on Windows.

Side note: There are multiple Linux Live CDs with flashrom, so you can use flashrom with the Bus Pirate even if you don't have Windows installed.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: pgeorgi on January 06, 2010, 03:17:54 pm
I'm currently working on a mingw (ie. win32) port of flashrom. USB, dummy are available, buspiratespi and serial are on my list - that would be flashrom with all supported external flashers, if I'm not mistaken - before I release.

Regards,
Patrick
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on January 06, 2010, 03:29:48 pm
That's excellent. Please keep us updated, I'll do a post when you make your release.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: pgeorgi on January 06, 2010, 10:16:43 pm
Attached zip contains a flashrom.exe with buspiratespi support.

I took out the FTDI-SPI programmer as it requires the libusb driver which reportedly has issues on Vista or newer, and the serial programmer driver isn't portable yet.

The code is revision 831 of the flashrom repository, with my patch (http://patchwork.coreboot.org/patch/740/ (http://patchwork.coreboot.org/patch/740/)), which hopefully makes it into the official version.

Select the buspirate programmer with
flashrom.exe -p buspiratespi:dev=COM9
(instead of COM9, you have to use your buspirate's COM port of course)

flashrom.exe -h will tell you how to select read, write, erase, verify modes.

For example:
flashrom -r test.bin -p buspiratespi:dev=COM9
to read the flash chip's content into test.bin.

As usual with opensource software, there's no warranty. I built it, ran it (without any SPI device attached to the buspirate), my buspirate is still alive. That's all the testing flashrom had to endure here.


Have fun.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on January 06, 2010, 11:16:35 pm
[quote author="pgeorgi"]
The code is revision 831 of the flashrom repository, with my patch (http://patchwork.coreboot.org/patch/740/ (http://patchwork.coreboot.org/patch/740/)), which hopefully makes it into the official version.[/quote]

The patch was committed a few minutes ago.

Thanks, Patrick!
Title: Re: Adding Bus Pirate support to flashrom?
Post by: pgeorgi on January 24, 2010, 07:42:04 pm
There were some windows-related issues in flashrom, which are fixed in the attached version (which is upstream r881 with http://patchwork.coreboot.org/patch/834/ (http://patchwork.coreboot.org/patch/834/) applied)
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on January 25, 2010, 03:50:46 pm
Thanks for the update pgeorgi. Do you have a use example for windows? I'm trying to read out a AT45DB041D (programming is unfortunately unsupported) but I get this:


C:>flashrom -p buspiratespi:dev=COM10
flashrom v0.9.1-r881
Error: cannot open serial port: No error

C:>

I think I'm not entering the port name correctly. Any hints?
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on January 25, 2010, 03:54:00 pm
Never mind, I got it. It won't take a COM port that's more than a single digit:

Code: [Select]
C:>flashrom -r dump.hex -p buspiratespi:dev=COM3
flashrom v0.9.1-r881
Calibrating delay loop... OK.
Found chip "Atmel AT45DB041D" (512 KB, SPI) at physical address 0xfff80000.
===
This flash part has status NOT WORKING for operations: READ
This flash part has status UNTESTED for operations: PROBE ERASE WRITE
Please email a report to flashrom@flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -rV,
-wV, -EV), and mention which mainboard or programmer you tested. Thanks for your
 help!
===
Reading flash... FAILED!
ERROR: flashrom has no read function for this flash chip.

C:>


Changing the Bus Pirate to COM3 worked.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: pgeorgi on January 25, 2010, 04:14:55 pm
Was reading the chip successful, too?

Thanks for the report with the multidigit COM ports.
It might be a problem in the FTDI Serial driver - at least I had the same issue with another FTDI-based device, with a totally different application.

The parser in flashrom has no assumption on the length of that value. On Linux, the device name is usually much longer.

I wrote a support request to FTDI, after all, it's their driver that seems to misbehave. Let's see if they react.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on January 25, 2010, 04:19:05 pm
Thanks!

No I couldn't read the chip, but flashrom could identify the JEDEC code. I accidentally posted the wrong output earlier, but now my previous post shows the flashrom output I got.

I'm developing firmware for an open source logic analyzer project (SUMP-PUMP) that uses this chip. I'm giving the device a Bus Pirate interface so it will work with (future) versions of flashrom. I'll use a perl or python script to program it for now.

Thanks again!
Title: Re: Adding Bus Pirate support to flashrom?
Post by: pgeorgi on January 26, 2010, 03:07:02 pm
The FTDI support pointed me to http://www.ftdichip.com/Support/Knowled ... higher.htm (http://www.ftdichip.com/Support/Knowledgebase/index.html?howdoiopencom10orhigher.htm)

just fyi, if you run into such a situation again. I think I'll add specific support for that notation (so COMx will be translated to \.COMx internally) to flashrom.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: pgeorgi on January 26, 2010, 10:06:29 pm
Attached flashrom, which is upstream version r883 without local changes, fixes the COM10 issue by rewriting the device to UNC if it starts with COM (case insensitive).
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on January 29, 2010, 01:37:13 am
[quote author="ian"]
Code: [Select]
C:>flashrom -r dump.hex -p buspiratespi:dev=COM3
flashrom v0.9.1-r881
Found chip "Atmel AT45DB041D" (512 KB, SPI) at physical address 0xfff80000.
===
This flash part has status NOT WORKING for operations: READ
This flash part has status UNTESTED for operations: PROBE ERASE WRITE
===
Reading flash... FAILED!
ERROR: flashrom has no read function for this flash chip.
[/quote]

The Atmel AT45DB041D is a very special/odd chip. It supports 256 or 264 byte sectors depending on some configuration status register. That register can be read with a command that is used as erase command on other SPI chips. Fun!

Anyway, with the current flashrom architecture you can support the 256 byte sector mode easily (at least for reading you just have to set .read=spi_chip_read, and writing is doable as well). The easiest way forward is to create a wrapper for probe_spi_rdid which reads the configuration status registers on success, and only returns success if the chip is in 256 byte mode. A separate flashchip entry (and a separate probe wrapper) would have to be created for the 264 byte mode, and then flashrom would detect the combination of chip model and sector size.

OTOH, the 264 byte sector mode has big holes in the address space (264 bytes data, 248 bytes hole, 264 bytes data, 248 bytes hole, ...) and flashrom can't cope with that yet, especially because it would have to map a contiguous hole-free ROM image to an address space with more holes than Swiss cheese.

So it all depends on the sector size.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on January 29, 2010, 07:54:10 am
The holes in the address space really got me. I wrote a perl script to load/dump the ROM image, and it wrote/read funny. Turns out that was the problem, I was addressing the gaps as well. Once I compensated, it worked fine.

Is 264 non-standard? There's an operation that will give the chip a 256byte/page address space, but it's a one time fuse. That's an extra step at the factory or something we'd have to make the user/upgrade program do, so I'm sticking with 264 byte mode for now.

Thanks for the explanation, it's very enlightening.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on January 29, 2010, 10:56:36 am
For NOR flash, 264 byte sectors (or any non-power-of-2 sectors) are extremely unusual.
Odd sizes (2^n+k, 2<=k<=16) are the norm on NAND flash and the k "extra" bytes are used for ECC (error-correcting code).

It is generally recommended to use the extra bytes for ECC (well, you can use them for data/code storage on some chips but that is not a good idea) so you only have 2^n (256 in your case) bytes for code/data per sector anyway.
Now the difference is just that long sectors allow error detection/correction and no direct mapping (you have to jump over the holes if you intend to map it) whereas the 2^n sized sectors have no way to perform error detection/correction but there are no holes in mapping and you can treat them as linear memory from a code POV.

Do not read below if you have a weak stomach.
-------------------------------------------------------------

There are some chips which have non-uniform sector sizes: either the topmost or bottommost sector(s) have size 2^n whereas the rest of the chip has size 2^n+k, and these variants are subdivided into those which allow linear mapping of the 2^n sized sectors and those which don't. Did I mention that the extra bytes exist even for the 2^n sized sectors on some chips, but they are readonly and explicitly not usable for ECC?
Some chips allow a one-time change (either direction) in sector size for the whole chip, some only support a change in one direction (your AT45DB041D).
Some chips have additional builtin RAM which can operate at the selected sector size (your AT45DB041D), others have RAM with fixed sector size, and finally a whole bunch of chips do not have RAM at all. Oh, and the amount of RAM (sector count) is arbitrary as well.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: pgeorgi on February 17, 2010, 09:24:45 pm
New release: flashrom r905 (with no local changes)

Most notable (for Win32 users): It opens files with "rb" or "wb" for read or write, so Windows doesn't try to convert newlines. This is in upstream for quite a while already, but it seems I forgot to post a new binary.

Thanks to Danny Grander who reminded me about this.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on February 17, 2010, 09:41:07 pm
Thanks for the update, I'll do a post too.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on July 04, 2010, 04:19:18 pm
I'm having a problem with my EN25F16 flashrom:

Code: [Select]
>flashrom.exe -p buspiratespi:dev=COM5 -c EN25F16 -V

flashrom v0.9.1-r905
SPI speed is 8MHz
Raw bitbang mode version 1
Raw SPI mode version 1
Calibrating delay loop... 682M loops per second, 100 myus = 0 us. OK.
Probing for Eon EN25F16, 2048 KB: RDID returned 0x1f 0xff 0xff. probe_spi_rdid_g
eneric: id1 0x1f, id2 0xffff
No EEPROM/flash device found.
If you know which flash chip you have, and if this version of flashrom
supports a similar flash chip, you can try to force read your chip. Run:
flashrom -f -r -c similar_supported_flash_chip filename

Note: flashrom can never write when the flash chip isn't found automatically.
Raw bitbang mode version 1
Bus Pirate shutdown completed.

As you can see, the Flash doesn't identify correctly, only the first byte is correct, the other bytes are all high (FF).

However, if i try to read the ID using the buspirate prompt, it identifies correctly!
Code: [Select]
READ: 0x1C 0x3F 0xFF 0xFF
Using the prompt the buspirate reads the second byte correctly.

Here is the full command sequence I used:
Code: [Select]
HiZ> m
1. HiZ
2. 1-WIRE
3. UART
4. I2C
5. SPI
6. 2WIRE
7. 3WIRE
8. KEYB
9. LCD
x. exit(without change)

(1)> 5
Set speed:
 1. 30KHz
 2. 125KHz
 3. 250KHz
 4. 1MHz

(1)> 4
Clock polarity:
 1. Idle low *default
 2. Idle high

(1)> 1
Output clock edge:
 1. Idle to active
 2. Active to idle *default

(2)> 1
Input sample phase:
 1. Middle *default
 2. End

(1)> 1
Select output type:
 1. Open drain (H=Hi-Z, L=GND)
 2. Normal (H=3.3V, L=GND)

(1)> 2
Ready.
SPI> W
POWER SUPPLIES ON
SPI> [0x9f r:4]
CS ENABLED
WRITE: 0x9F
READ: 0x1C 0x3F 0xFF 0xFF
CS DISABLED
SPI>

I also tried using flashrom at 1MHz like i did on the prompt but it still fialed to read the second byte.

My conclusion is that the flashrom program has to have some bug in it. Can you help me?
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on July 06, 2010, 10:52:50 am
Com on... Don't tell me I will have tu buy/make another device just to program this one flash chip.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on July 06, 2010, 10:56:34 am
I'm sorry, I'm not a flash rom expert so I can't help with the software. If you capture the traffic with portmon I can look to be sure the Bus Pirate isn't having any errors.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: Microfunguy on July 07, 2010, 01:34:03 pm
[quote author="RJSC"]
My conclusion is that the flashrom program has to have some bug in it. Can you help me?
[/quote]

Well, yesterday with the same memory chip, I simply used :-

flashrom -r test.bin -p buspiratespi:dev=COM5

and after a very long time (an hour ?) it completed without problems.


David
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on July 07, 2010, 01:45:18 pm
Do you have the buspirate v 5.1 firmware? (as I do)
Title: Re: Adding Bus Pirate support to flashrom?
Post by: Microfunguy on July 07, 2010, 03:41:03 pm
No, 3.0 on SparkFun BusPirate.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on July 07, 2010, 03:53:22 pm
Ok, now I'm almost shure it's the newer versions of the BusPirate firmware who are to blame!

I've found someone with a similar unsolved problem on another topic: http://dangerousprototypes.com/forum/index.php?topic=651.msg5970 (http://http://dangerousprototypes.com/forum/index.php?topic=651.msg5970)
Quote
Hi,

I'm currently debugging a problem with a flashrom user who has a Bus-Pirate V3 with Firmware v4.5. The problem manifests itself as an all-0x00 read from SPI for the first SPI command.

Seems that it only works on v3 firmwares.

Now, how will I downgrade the firmware? Since from v4 upwards the bootloaders are different/incompatible.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on July 07, 2010, 04:07:36 pm
Well I think it would be best to fix the firmware :) I need to see a log of the traffic (portmon) to know what it's doing and what isn't working.

Quote
Does it work if you send a dummy byte while CS is not active for the flash chip and avoid the broken first byte?

How many bytes are you send/reading with 0x10? The Bus Pirate should respond to the 0x10 with 0x01 and then respond to each send/read with a byte from the bus.

I'd be happy to take a look at a full log.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on July 07, 2010, 04:18:09 pm
I want to add - biosflasher is you're listening - I want to add a new bulk write for flashrom that allows up to 4096 to be read/write without the ack and without pausing. Let me know if you're still around.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on July 07, 2010, 07:13:06 pm
Ok, I'll try to log the comms.
As for sending a dummy byte first, it has to be done on the PC program flashrom, and I don't think I know how to do it just yet.
Our best shot is to fix the firmware, since it works on v3, and manual SPI mode, the defect is on the firmware.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on July 08, 2010, 07:16:01 am
Got a log!

Command Line:
Code: [Select]
C:>flashrom -p buspiratespi:dev=COM5 -c EN25F16 -V
flashrom v0.9.1-r905
SPI speed is 8MHz
Raw bitbang mode version 1
Raw SPI mode version 1
Calibrating delay loop... 619M loops per second, 100 myus = 0 us. OK.
Probing for Eon EN25F16, 2048 KB: RDID[u][b] returned 0x1f 0xff 0xff[/b][/u]. probe_spi_rdid_generic: id1 0x1f, id2 0xffff
No EEPROM/flash device found.
If you know which flash chip you have, and if this version of flashrom
supports a similar flash chip, you can try to force read your chip. Run:
flashrom -f -r -c similar_supported_flash_chip filename

Note: flashrom can never write when the flash chip isn't found automatically.
Raw bitbang mode version 1
Bus Pirate shutdown completed.

Serial Comunication Log:
Code: [Select]
Port opened by process "flashrom.exe" (PID: 848)

Request:

 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00   ................
 00 00 00 00                                       ....           

Answer:

 42 42 49 4F 31                                    BBIO1          

Request:

 01                                                .              

Answer:

 53 50 49 31                                       SPI1           

Request:

 4B                                                K              

Answer:

 01                                                .              

Request:

 67                                                g              

Answer:

 01                                                .              

Request:

 8A                                                Å               

Answer:

 01                                                .              

Request:

 03                                                .              

Answer:

 01                                                .              

Request:

 02                                                .              

Answer:

 01                                                .              

Request:

 13 9F 00 00 00                                    .Ÿ...          

Answer:

 01 00 1F FF FF                                    ...ÿÿ          

Request:

 03                                                .              

Answer:

 01                                                .              

Request:

 00                                                .              

Answer:

 42 42 49 4F 31                                    BBIO1          

Request:

 0F                                                .              

Port closed
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on July 08, 2010, 08:24:47 am
Quote
Request:

 13 9F 00 00 00                                    .Ÿ...          

Answer:

 01 00 1F FF FF                                    ...ÿÿ          

Thanks! This is a ton of help. I'll work on this today. I'm guessing this shows the elusive preceding 0x00 byte.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on July 08, 2010, 11:13:54 am
[quote author="ian"]
Quote
Request:

 13 9F 00 00 00                                    .Ÿ...          

Answer:

 01 00 1F FF FF                                    ...ÿÿ          

Thanks! This is a ton of help. I'll work on this today. I'm guessing this shows the elusive preceding 0x00 byte.
[/quote]

But the 0x00 is not the only problem.

On manual mode (as shown before) the chip answers to 0x9F with 0x1C 0x3F, but on that raw spi mode the buspirate after that first 0x00 byte shows 0x1F 0xFF and that is still wrong, so, maybe its mixing bits in the buffer or something.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on July 08, 2010, 02:58:15 pm
01= SPI mode

4b = 0100-1011 =
0100wxyz – Configure peripherals, w=power, x=pullups, y=AUX, z=CS

67= 0110-0111 =
01100xxx – Set SPI speed, 30, 125, 250khz; 1, 2, 2.6, 4, 8MHz

8a=1000-1010=
1000wxyz – SPI config, w=output type, x=idle, y=clock edge, z=sample

3 = CS high (1)

2 = CS low (0)

13 =send 4 bytes
9f=JEDEC ROM ID command
3 byte read = JEDEC ID (I thought it was four according to:
http://dangerousprototypes.com/docs/AT4 ... ash_memory (http://dangerousprototypes.com/docs/AT45DB041D_4Mbit_flash_memory)

3 = CS high

00=return to BBIO

0F = reset

I connected to the Logic Sniffer with the aforementioned ROM IC. It works in terminal mode:

Quote
SPI> [0x9f r:4]
CS ENABLED
WRITE: 0x9F
READ: 0x1F 0x24 0x00 0x00
CS DISABLED
SPI>

Now I'll try with the binary mode:

Code: [Select]
{0D}{0A}Bus Pirate v3a{0D}{0A}Firmware v5.2RC (r413) Bootloader v4.3{0D}{0A}DEVID:0x0447 REVID:0x3043 (B5){0D}{0A}http://dangerousprototypes.com{0D}{0A}HiZ> {00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}BBIO1{01}SPI1{4B}{01}{67}{01}{8A}{01}{03}{01}{02}{01}{13}{01}{9F}{00}{00}{1F}{00}{24}{00}{00}{03}{01}{00}BBIO1{0F}{01}{0D}{0A}Bus Pirate v3a{0D}{0A}Firmware v5.2RC (r413) Bootloader v4.3{0D}{0A}DEVID:0x0447 REVID:0x3043 (B5){0D}{0A}http://dangerousprototypes.com{0D}{0A}HiZ> 

Broken down:

Code: [Select]
{0D}{0A}Bus Pirate v3a{0D}{0A}Firmware v5.2RC (r413) Bootloader v4.3{0D}{0A}DEVID:0x0447 REVID:0x3043 (B5){0D}{0A}http://dangerousprototypes.com{0D}{0A}HiZ> 

Reset

Code: [Select]
{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}{00}BBIO1

Enter BBIO

Code: [Select]
{01}SPI1

Enter SPI

Code: [Select]
{4B}{01}{67}{01}{8A}{01}

Setup sequence
Code: [Select]
{03}{01}{02}{01}

CS setup

Code: [Select]
{13}{01}{9F}{00}{00}{1F}{00}{24}{00}{00}

Get JEDEC ID

Code: [Select]
{03}{01}

set CS

Code: [Select]
{00}BBIO1

return to BBIO

Code: [Select]
{0F}{01}

reset

Code: [Select]
{0D}{0A}Bus Pirate v3a{0D}{0A}Firmware v5.2RC (r413) Bootloader v4.3{0D}{0A}DEVID:0x0447 REVID:0x3043 (B5){0D}{0A}http://dangerousprototypes.com{0D}{0A}HiZ> 

So far I don't see any indication of a problem. I didn't see the phantom byte described in another thread, I don't see anything mixed up in the buffer. The binary mode code has been the same over the last several firmwares. Nothing has changed, and the SPI functions are pretty simple. Just to be sure, you can check the revision history here:
http://code.google.com/p/the-bus-pirate ... &start=416 (http://code.google.com/p/the-bus-pirate/source/list?path=/trunk/source/SPI.c&start=416)

Raw SPI mode was added here:
http://code.google.com/p/the-bus-pirate ... I.c&old=48 (http://code.google.com/p/the-bus-pirate/source/diff?path=/trunk/source/SPI.c&format=side&r=50&old_path=/trunk/source/SPI.c&old=48)

and there were no major revisions to the rawspi part until today when I removed some old, unused options (this isn't in the compile or SVN yet).

There could still very well be something wrong with the Bus Pirate firmware, especially if Flashrom consistently works on old versions but not new ones. I don't know what it would be though because repeating the flashrom commands seem to work fine for me. I'll get the flashrom app and try it now too.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on July 08, 2010, 03:09:41 pm
@Microfunguy - what version/platform of flashrom did you use?
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on July 08, 2010, 03:22:18 pm
I tested with the newest and the older version of flashrom, both are working for me with with v5.2 nightly:

Here's a test with r881, the latest I already had:

Code: [Select]
C:>flashrom -p buspiratespi:dev=COM3
flashrom v0.9.1-r881
Calibrating delay loop... OK.
Found chip "Atmel AT45DB041D" (512 KB, SPI) at physical address 0xfff80000.
===
This flash part has status NOT WORKING for operations: READ
This flash part has status UNTESTED for operations: PROBE ERASE WRITE
Please email a report to flashrom@flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -rV,
-wV, -EV), and mention which mainboard or programmer you tested. Thanks for your
 help!
===
No operations were specified.

C:>

Here's the latest in the forum (905):

Code: [Select]
C:>flashrom -p buspiratespi:dev=COM3
flashrom v0.9.1-r905
Calibrating delay loop... OK.
Found chip "Atmel AT45DB041D" (512 KB, SPI) at physical address 0xfff80000.
===
This flash part has status NOT WORKING for operations: READ
This flash part has status UNTESTED for operations: PROBE ERASE WRITE
Please email a report to flashrom@flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -rV,
-wV, -EV), and mention which mainboard or programmer you tested. Thanks for your
 help!
===
No operations were specified.

C:>
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on July 08, 2010, 03:39:41 pm
Here's the latest nightly version (will be v5.2 tomorrow probably) if you'd like to try it:

Code: [Select]
HiZ> i
Bus Pirate v3a
Firmware v5.2RC (r419) Bootloader v4.3
DEVID:0x0447 REVID:0x3043 (B5)
http://dangerousprototypes.com
HiZ>

http://the-bus-pirate.googlecode.com/sv ... e-v5.2.hex (http://the-bus-pirate.googlecode.com/svn/trunk/firmware/v5-nightly/BPv3&v2go/BPv3-Firmware-v5.2.hex)
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on July 08, 2010, 09:29:30 pm
I've upgraded to v 5.2, but I still can't understand why with flashrom this continues t fail.

Manual SPI mode:
Code: [Select]
m
1. HiZ
2. 1-WIRE
3. UART
4. I2C
5. SPI
6. 2WIRE
7. 3WIRE
8. KEYB
9. LCD
x. exit(without change)

(1)> 5
Set speed:
 1. 30KHz
 2. 125KHz
 3. 250KHz
 4. 1MHz

(1)> 4
Clock polarity:
 1. Idle low *default
 2. Idle high

(1)> 1
Output clock edge:
 1. Idle to active
 2. Active to idle *default

(2)> 1
Input sample phase:
 1. Middle *default
 2. End

(1)> 1
Select output type:
 1. Open drain (H=Hi-Z, L=GND)
 2. Normal (H=3.3V, L=GND)

(1)> 2
Ready.
SPI> W
POWER SUPPLIES ON
SPI> [0x9F r:4]
CS ENABLED
WRITE: 0x9F
READ: 0x1C 0x31 0x15 0x1C
CS DISABLED
SPI>

Flashrom
Code: [Select]
53	0.00065535	flashrom.exe	IRP_MJ_WRITE	VCP0	SUCCESS	Length 1: 00 	
54 0.01508169 flashrom.exe IRP_MJ_READ VCP0 SUCCESS Length 5: 42 42 49 4F 31
55 0.00098858 flashrom.exe IRP_MJ_WRITE VCP0 SUCCESS Length 1: 01
56 0.00701392 flashrom.exe IRP_MJ_READ VCP0 SUCCESS Length 4: 53 50 49 31
57 0.00089599 flashrom.exe IRP_MJ_WRITE VCP0 SUCCESS Length 1: 4B
58 0.01500788 flashrom.exe IRP_MJ_READ VCP0 SUCCESS Length 1: 01
59 0.00091818 flashrom.exe IRP_MJ_WRITE VCP0 SUCCESS Length 1: 67
60 0.01473140 flashrom.exe IRP_MJ_READ VCP0 SUCCESS Length 1: 01
61 0.00113876 flashrom.exe IRP_MJ_WRITE VCP0 SUCCESS Length 1: 8A
62 0.01400693 flashrom.exe IRP_MJ_READ VCP0 SUCCESS Length 1: 01
63 0.00094890 flashrom.exe IRP_MJ_WRITE VCP0 SUCCESS Length 1: 03
64 0.01502921 flashrom.exe IRP_MJ_READ VCP0 SUCCESS Length 1: 01
65 0.00073514 flashrom.exe IRP_MJ_WRITE VCP0 SUCCESS Length 1: 02
66 0.01102412 flashrom.exe IRP_MJ_READ VCP0 SUCCESS Length 1: 01
67 0.00050346 flashrom.exe IRP_MJ_WRITE VCP0 SUCCESS Length 5: 13 9F 00 00 00
68 0.01300597 flashrom.exe IRP_MJ_READ VCP0 SUCCESS Length 5: 01 00 18 7F FF
69 0.00095231 flashrom.exe IRP_MJ_WRITE VCP0 SUCCESS Length 1: 03
70 0.01499337 flashrom.exe IRP_MJ_READ VCP0 SUCCESS Length 1: 01
71 0.00030976 flashrom.exe IRP_MJ_WRITE VCP0 SUCCESS Length 1: 00
72 0.00495015 flashrom.exe IRP_MJ_READ VCP0 SUCCESS Length 5: 42 42 49 4F 31
73 0.00094079 flashrom.exe IRP_MJ_WRITE VCP0 SUCCESS Length 1: 0F
74 0.00000171 flashrom.exe IRP_MJ_CLEANUP VCP0 SUCCESS
75 0.13480893 flashrom.exe IRP_MJ_CLOSE VCP0 SUCCESS

Sometimes buspirate returns 01 00 18 7F FF others 01 00 1F FF FF, on manual mode it always reads it correctly
Title: Re: Adding Bus Pirate support to flashrom?
Post by: Sjaak on July 08, 2010, 09:37:33 pm
Have you tweaked your settings in FTDI driver?
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on July 08, 2010, 09:57:20 pm
No, its all default settings, on Windows 7
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on July 09, 2010, 08:19:29 am
I'm not sure what else to test on my side, I'm open to any suggestions though. Probably we need to work together with the flashrom devs to figure out what's going on.

Do you have any luck with the older version posted in the forum? How about compiling from source? Have you tried on a different computer?

This is a test compile of the firmware with a new SPI bulk routine. It should move data in and out faster than before in bulk chunks. I'm not sure why timing would effect you, given that the user terminal mode is much slower than the binary mode, but here is it just in case:
http://the-bus-pirate.googlecode.com/sv ... .2-alt.hex (http://the-bus-pirate.googlecode.com/svn/trunk/firmware/v5-nightly/BPv3&v2go/BPv3-Firmware-v5.2-alt.hex)
http://the-bus-pirate.googlecode.com/sv ... .2-alt.hex (http://the-bus-pirate.googlecode.com/svn/trunk/firmware/v5-nightly/BPv3&v2go/BPv3-Firmware-v5.2-alt.hex)
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on July 09, 2010, 10:07:18 am
Thanks for all your efforts. Maybe my chip is damaged!
I ordered another device, I'll test later when it arrives.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: ian on July 09, 2010, 10:19:36 am
Quote
Windows 7

I missed that... My hunch is it'll work on an XP PC. Either because of flashrom executable or FTDI drivers. Is it possible to test?
Title: Re: Adding Bus Pirate support to flashrom?
Post by: Microfunguy on July 09, 2010, 03:32:35 pm
I was running 3.0 on WinXP SP2 and as previously stated that worked fine.


David
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on July 10, 2010, 02:21:30 am
I'll try at someone's windows XP PC when I get a new chip.

Today I  accidentally powered it from the 5V rail, and now its is very unreliable, sometimes works on manual mode, sometimes is doesn't.

The datasheet states 2.7V - 3.6 V, so it must be toasted now.

Searching for a website to order a new EN25F16 (SOP 8), the cheapest I've found was about 7 USD + shipping, and mine came form an 11 USD (shipping included) micro video camera I was patching the firmware to remove a forced yellow overlay date.
With a flash chip costing more than 65% of a full device that happens to contain it, I prefer to buy a new one and keep the old PCB for parts!

Does any of you know of an website where to order an EN25F16 at an affordable price?

Thanks!
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on August 02, 2010, 02:13:05 pm
[quote author="RJSC"]
Command Line:
Code: [Select]
C:>flashrom -p buspiratespi:dev=COM5 -c EN25F16 -V
flashrom v0.9.1-r905
SPI speed is 8MHz
Raw bitbang mode version 1
Raw SPI mode version 1
Probing for Eon EN25F16, 2048 KB: RDID[u][b] returned 0x1f 0xff 0xff[/b][/u]. probe_spi_rdid_generic: id1 0x1f, id2 0xffff
No EEPROM/flash device found.
[/quote]

There is one huge difference between what you're doing and what others are doing. You are specifying the flash chip, and everyone else (well, at least everyone who doesn't have problems) is not specifying the flash chip. This may very well be related to the problem that the first SPI response from the chip in many verbose logs is shown to be garbage, at least in the combination of some Bus Pirate versions with some flash chip families. A good explanation would be that flash chips need time to "boot" and will only respond with garbage until 1-200 ms after applying power. Given the communication speed between the host and the Bus Pirate, some chips will be fast enough to work, and others will be too slow.

Please run
Code: [Select]
flashrom -p buspiratespi:dev=COM5 -V
and post the full log either here or mail it to flashrom@flashrom.org (http://mailto:flashrom@flashrom.org) would be appreciated).
Title: Re: Adding Bus Pirate support to flashrom?
Post by: RJSC on August 03, 2010, 04:28:42 pm
I have tried without specifying the chip and the result is the same, I get an "Unknown Device".
I just posted the command specifying the chip because it produces a much smaller verbose output to post here.
If I don't specify the chip, it tries every supported chip on the list, getting back the same erroneous response I get when I specify the chip each try it makes.
Now I can't test it anymore, the chip was flashed with a parallel port interface and is now soldered on the device.
Title: Re: Adding Bus Pirate support to flashrom?
Post by: biosflasher on August 04, 2010, 07:14:05 pm
[quote author="RJSC"]
I have tried without specifying the chip and the result is the same, I get an "Unknown Device".
[/quote]
If you still have a full verbose log, maybe I can see a pattern in there.

[quote author="RJSC"]
I just posted the command specifying the chip because it produces a much smaller verbose output to post here.
If I don't specify the chip, it tries every supported chip on the list, getting back the same erroneous response I get when I specify the chip each try it makes.
[/quote]
OK, that should not have happened. If I had seen your post earlier, I would have asked you to try a patches which makes Bus Pirate init a lot more paranoid.

I noticed that the frequency differed between the manual run and the flashrom run. I need to check the rest of the settings as well.

[quote author="RJSC"]
Now I can't test it anymore, the chip was flashed with a parallel port interface and is now soldered on the device.
[/quote]
Congratulations on having gotten it working again.

I would be very interested in a flashrom run on that mainboard (internal programmer, verbose mode, detection only).