| Message |
Board |
Subject |
Date |
| How much off is it? The raw RLE data looks about right. Is the 16-bit mode also off when sampling at 100 MHz? |
Open Bench Logic Sniffer |
Re: Re: Status of RLE |
January 27, 2011, 07:17:16 pm |
| Oh, I believe the off by one is there by design. I didn't design it that way. I believe Jonas, the author of the current RLE ... |
Open Bench Logic Sniffer |
Re: Re: Status of RLE |
January 27, 2011, 03:19:37 pm |
| 0.0.7The finish command is now 0x05.Timer removed in favor of the finish command.The code has been optimized and made easier ... |
Open Bench Logic Sniffer |
Re: Status of RLE |
January 26, 2011, 03:20:54 am |
| What data type is DI? Looks too me like it's treated like a 4 by 8 array of bits, but I could be wrong. |
Open Bench Logic Sniffer |
Re: Status of RLE |
January 24, 2011, 08:31:03 pm |
| Yeah, the timing score is the thing that drops by 25% when you throw out the hardware timer... |
Open Bench Logic Sniffer |
Re: Status of RLE |
January 24, 2011, 07:47:45 pm |
| Right, that's better.Anyway, with regards to jgover's idea to use a software timer instead of a hardware timer: that would ce... |
Open Bench Logic Sniffer |
Re: Status of RLE |
January 24, 2011, 06:36:57 pm |
| Aha, I see... Well, it should be a short command. The finish command is meant to be used by a pushbutton in the client and po... |
Open Bench Logic Sniffer |
Re: Status of RLE |
January 24, 2011, 05:02:04 pm |
| It's a very good idea to use a dedicated RLE flag signal, especially if that means we can use the full 32, 16 and 8 bits for ... |
Open Bench Logic Sniffer |
Re: Status of RLE |
January 24, 2011, 04:24:47 pm |
| All right, the FPGA side of this is on my to do list. |
Open Bench Logic Sniffer |
Re: SUMP metadata com... |
January 24, 2011, 01:21:30 pm |
| All right, that's nice. I'll start a new thread for the metadata module then... |
Open Bench Logic Sniffer |
Re: Status of RLE |
January 24, 2011, 01:19:12 pm |
