I knew I forgot to mention something. I also attached the buffer wing to the unbuffered input signals and changed the settings to outside number scheme and channel group 1.
In this case I see perfect aligned signals. I think you're right I killed the first input/output of the buffer chip.
I don't think it's a problem with the capture settings because it works on all the channels but the channel 0. The signal I wanted to measure has a frequency of 5MHz. If I reduce the frequency very much(1kHz) and measure with a high sampling rate (50MHz) the described behavior is the same. But if I reduce then the sampling rate to 1 MHz the channels seem to be aligned.
I'll have to act with more care with my test equipment.
The funny thing is all I wanted to do was to build a waveform generator with the CPLD breakout board to test the Open Logic Sniffer.
I have a little problem with my OLS. Pin 0 to 5 are connected to 1 toggling signal. My problem is that the channel 0 is shifted against the other signals and also the width doesn't seem to be right (see screenshot).
I tested several FPGA/PIC combinations: - logic_sniffer_3.07-Demon-Core.bit and OLSv1.firmware.v3.0.hex - logic_sniffer_3.07-Demon-Core.bit and OLSv1.firmware.v2.6.hex - Logic_Sniffer_dynamic_depth_2.12.bit and OLSv1.04-firmware-v2.3.hex
I also tested several clients: - Jawi's Logic Sniffer client OLS v0.9.6 BETA 1, OLS v0.9.5 and OLS v0.9.4 - pyLogicSniffer
With a magnifying glass I can't see any hardware problems. With an oscilloscope the signals seem to be simultaneous.
Has anybody an idea what the cause could be?
Thanks, frankalicious
Edit: OS: linux update package 3.08 from gadgetfactory
Did some meassurements. I get about 18MHz at room temperature. But as you can see in the attached screenshot my DSO really does a bad job meassuring the frquency. Maybe I can take the board to work with me and do the meassurements with a better scope.
Regarding the stability of the clock I have to disagree with Lothar. The clock is only stable as long as the temp is stable. The frequnecy of the clock also varys from device to device.
I don't have any meassurements at hand. Maybe someone with precise meassurement equipment should meassure the frequency. I'll take some meassurements with my home equipment and add them here.
I want to share my latest project with you. Some time ago I ordered the coolrunnerII demo board. Yesterday I thought I should do something "usefull" with it. The easiest thing I thought would be a blinken LED. To achieve this you don't need much more than a clock and a counter. But the board is shipped without a clock source. I thought about hooking up an external clock source. This would have been the easiest but also the most ungeeky solution.
I remembered that it's possible to implement a ringoscillator in a PLD.
A ringoscillator can be implemented through a shiftregister with an inverted input. (Have a look at the attached sources or ask me) The ringoscillator is feeding a counter and the counter is feeding the two leds.
The most critical part was to prevent xst from optimizing away the ringoscillator. This is achieved by the "keep" syntheses attributes.
attribute KEEP : string; attribute KEEP of ring : signal is "true";
To test the design you simply have to upload the ringoscillator.svf to your coolrunnerII board. After the cpld is configured you have to reset the ringoscillator by pressing the button. If you have any questions don't hesitate to ask.
Unfortunately it looks like the pin is broken. I'm really sorry about that.
Would you please share how it happened, maybe there is a software or hardware mod we can make to stop this from happening again. For example maybe we check the pins on a timer and if the pins don't match the expected state it goes hi-z after a short time, this is the same method we use wit the power supplies when they are enabled (though they also have over current protection).[/quote] I was in UART mode and wanted to test the UART communication to another device. I think I connected the MOSI line of the Bus Pirate with the 5V of the test device.
[quote author="ian"] I would offer to fix it for you, but the non-lead solder Seeed uses makes it almost impossible for me to hot-air off the 28-pin PIC chip without damaging the PCB.[/quote] Thank you.No Problem, I will order 2 new Bus Pirate from Seeedstudio. Fortunately the Bus Pirate isn't that expensive.
~ Disconnect any devices Connect (Vpu to +5V) and (ADC to +3.3V) Space to continue Ctrl AUX OK MODE LED OK PULLUP H OK PULLUP H OK VREG OK ADC and supply 5V(5.04) OK VPU(5.02) OK 3.3V(3.31) OK ADC(3.30) OK Bus high MOSI FAIL CLK OK MISO OK CS OK
Bus Hi-Z 0 MOSI OK CLK OK MISO OK CS OK Bus Hi-Z 1 MOSI FAIL CLK OK MISO OK CS OK MODE and VREG LEDs should be on! Any key to exit Found 2 errors. HiZ>
client already supports zooming with CTRL + mouse wheel
Thanks! That's enough for me, I didn't realize.[/quote]
I just testet the implemented mouse zoom function, it's also enough for me. The other zoom implementations would be nice, but aren't really urgent. Thanks again for your good work.
one little thing I miss in Jawi's client are other ways to zoom. I have some suggestions for other ways to zoom in the graphic.
- zoom between cursors You mark cursor 1 then you mark cursor 2 in the graph. In the menu you can choose to zoom to this section.
- zoom with mouse button For example you press the left mouse button, move the mouse a little bit right and then release the mouse button. The the graph zooms to this section.
Am I the only one who thinks that would be usefull?