The NAND on the Xbox 360 can be accessed via an SPI based protocol. Current implementations use the standard MOSI, MISO, SS, and SCK pins, plus two additional IO pins (which one document referred to as "J2B1(6): Ctr?" and "J2B1(5): Eject"). I do not fully understand the purpose of these two extra pins (although some more in-depth reading could probably fix that), but overall, I bet it would be possible to find a way to use the Bus Pirate's one remaining IO pin (AUX) to take care of the job, given some creativity.
Is there any reason I can't enable the power supply in HI-Z mode? That seems like something that should work no matter what mode the device was in. Sorry if I'm misunderstanding something. Thank you.
