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Messages - alexwhittemore

35
Client software / Re: Client beta testers
Depending on what FPGA dev boards people have, I can whip up an arb of sorts in verilog. I myself have a Digilent Nexys2, so it'd be targeted for that, but you could just define a file of values to loop out, maybe with on-board switch controls for sample frequency.
37
Client software / Re: Priority List
Same. I looked quick at the github issue tracker/conversation feature set and came away unimpressed, but I didn't look hard and I agree it's by far the easiest place to start. I'll start using it now.
38
Client software / Re: Priority List
I was thinking that it might be beneficial to have a maintained bug tracker for the sake of feature requests and bug reporting, perhaps even something like trac+a git plugin. Like Tom, I feel bad pointing out bugs and requesting features, since I know how big a pain it is to keep track of arbitrary forum posts.
39
Client software / Re: Feature request: rearrange channels
jawi: If you'd like to provide defaults for a more general system, I'm all for it. The saleae harness is ordered
black
brown
red
orange
yellow
green
blue
purple
gray
where the harness has a label on the gray line for ground, and the saleae client assumes gray to be ground. It'd be nice to have both forward and reverse options though, since black makes more sense to some.

In general, though, I still request the ability to make arbitrary channel color definitions, since I could just as easily use a few pieces of F-F jumper wire to connect to the DUT.
41
Client software / Re: Jawi's Logic Sniffer client: other zoom implementations
The concept of what zooming is intuitive is entirely dependent on what EDA software you're used to. For example, I spend a lot of my day in Cadence Virtuoso so I'm used to the middle-click-and-drag, and when I switch to Magma Titan, the scroll-zoom throws me for a total loop. It's probably safe to say that using modifier keys isn't super intuitive in any system, though.
43
Client software / Re: Virtual "GND"
The salee is much slower than the OLS, I think only 24MSPS max. The 'probe' I'm talking about is just a female 1x9 header with separated heavy wires terminating in female square headers (to be plugged into the DUT directly, to attach to EZ-Hooks, etc). The point is that the wires don't necessarily run parallel for a full foot, so parasitics aren't always so bad (but they definitely show up unless you ground unused leads).

I like the idea of probe wings, though, and I don't necessarily think they're outside of the scope of the project. An 8ch impedance matching/SMA connector wing would probably not be too expensive to sell, and would open up the device to be used for low-criticality but midrange frequency applications. I don't ever expect the OLS to be a multi-ghz wonderboard, but for an extra $20 wing and some SMA cables, I'm sure a number of people would appreciate not having to worry about signal accuracy, and for those that don't know any better, their application is probably not tremendously affected by the problem.

EDIT:
Although the point remains that your idea to simply turn off channels in software for the sake of avoiding confusion is a good one, and should be easy to implement.
44
Client software / Re: Virtual "GND"
So perhaps in future hardware revisions it'd be nice to have an external tgate or something to optionally tie inputs low via resistors, but it seems to me the problem is generally easy to avoid as long as you're using a slightly nicer probe harness. My strategy has been to use the Salee logic probe harness, which has separated wires and no hard-mounted probes. If I need hook leads, I attach a few of my EZ-Hooks, and any wires I'm not using get plugged into a ground header I made by just soldering a row of male headers together with a female plug to throw on any ground point on the OLS.
45
Client software / Re: Re: Jawi's Logic Sniffer client software - support and b
[quote author="jawi"]@alexwhittemore: strange, cannot remember having touched the UART decoding routines for a while... If you can send me your traces, I'll take a look at it...[/quote]

I don't know what the deal was, but at any rate, all of the bugs I've had with earlier versions seem to be fixed in .9.3sp1, so we're golden. For the record, bugs were 1: diagram mode:byte value would display a transition every clock cycle and never any values (works fine as of SP1), 2:UART analysis would analyze 2 frames then stop, despite substantially more frames available to decode (works fine now), 3: Device would regularly fail to connect despite proper OS level connection, also fixed now. 4:Mac .app package wouldn't launch, fixed.

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