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Messages - skot9000

1
DirtyPCBs support / Re: Any payment alternative to PayPal?
For some reason I cannot understand, PayPal refuses to let me use their service. The DirtyPCB checkout page won't let me just use my credit card without becoming a PayPal member. What am I to do?

Sincerely, PayPal's Not My Pal
2
Bus Blaster JTAG debugger / Re: Bus Blaster v4 power up test success, bitstream next
Ah ha! That's prolly my fault — not sure why I commented those out. anyways, the tests pass with the following;

Code: [Select]
#unused ft2232 connections
NET "ACBUS6"      	LOC =  "P37";   #AC6
NET "ACBUS7"      	LOC =  "P36";   #AC7

self-test output;
Code: [Select]

C:Documents and SettingsAdministratorDesktopbusblasterdangerous-prototypes
manufacturing_resourcesv2-selftest>BusPiratev2Test_VisualC++Express.exe -delay
-n0
Select device:
Device 0 (Serial Number: FTVDJFA1A

======================================================
SUCCESS (Connected to the FTDI.FTVDJFA1A)
SUCCESS (reset)
SUCCESS (usb parameters set)
SUCCESS (event chars disabled)
SUCCESS (timeouts set)
SUCCESS (latency set)
SUCCESS (flow control disabled)
SUCCESS (MSSPE reset)
SUCCESS (MPSSE on)
START TESTING

======================================================
        00000001        00000001
        00000010        00000010
        00000100        00000100
        00001000        00001000
        00010000        00010000
        00100000        00100000
        01000000        01000000
        10000000        10000000
        00000000        00000000
        10101010        10101010
        01010101        01010101
        00000000        00000000
        11111111        11111111
Testing complete, errors: 0

C:Documents and SettingsAdministratorDesktopbusblasterdangerous-prototypes
manufacturing_resourcesv2-selftest>pause
Press any key to continue . . .
3
Bus Blaster JTAG debugger / Re: Bus Blaster v4 power up test success, bitstream next
I'm not really sure how the self-test works, but it looks like something is two bits off... here is the output I get from the self-test .bat file;

Code: [Select]
C:Documents and SettingsAdministratorDesktopbusblasterdangerous-prototypes
manufacturing_resourcesv2-selftest>BusPiratev2Test_VisualC++Express.exe -delay
-n0
Select device:
Device 0 (Serial Number: FTVDJFA1A

======================================================
SUCCESS (Connected to the FTDI.FTVDJFA1A)
SUCCESS (reset)
SUCCESS (usb parameters set)
SUCCESS (event chars disabled)
SUCCESS (timeouts set)
SUCCESS (latency set)
SUCCESS (flow control disabled)
SUCCESS (MSSPE reset)
SUCCESS (MPSSE on)
START TESTING

======================================================
        00000001        11000001
        00000010        11000010
        00000100        11000100
        00001000        11001000
        00010000        11010000
        00100000        11100000
        01000000        11000000
        10000000        11000000
        00000000        11000000
        10101010        11101010
        01010101        11010101
        00000000        11000000
        11111111        11111111
Testing complete, errors: 12

C:Documents and SettingsAdministratorDesktopbusblasterdangerous-prototypes
manufacturing_resourcesv2-selftest>pause
Press any key to continue . . .
4
Bus Blaster JTAG debugger / Re: Bus Blaster v4 power up test success, bitstream next
Sure.

I haven't done a lot of testing with it, but UrJtag seems to recognize connected CPLDs fine.
I couldn't figure out what to do with "TARGET_PRESENT" input so I hardcoded the "FT_TARGET_PRESENT" output to 0 in the verilog.

here is my UCF file and the SVF file I generated.
[attachment=0]

I guess I meant; Is there a BBv2 Self-test ISE project I can look at to modify into one for BBv4?
5
Bus Blaster JTAG debugger / Re: Bus Blaster v4 power up test success, bitstream next
Is there an ISE project for the BBv4 Self test buffer?

With my modified version of the BBv2 jtagkey buffer, UrJTAG does recognize both CPLDs on my old Digilent XC2-XL dev board.

Code: [Select]
jtag> cable jtagkey interface=0
Connected to libftd2xx driver.
jtag> detect
IR length: 16
Chain length: 2
Device Id: 01001001011000000100000010010011 (0x49604093)
  Manufacturer: Xilinx (0x093)
  Part(0):      xc9572xl (0x9604)
  Stepping:     4
  Filename:     /usr/local/share/urjtag/xilinx/xc9572xl/xc9572xl_cs48
Device Id: 00000110110101001100000010010011 (0x06D4C093)
  Manufacturer: Xilinx (0x093)
  Part(1):      XC2C256-TQ144 (0x6D4C)
  Stepping:     0
  Filename:     /usr/local/share/urjtag/xilinx/xc2c256-tq144/xc2c256-tq144
6
Bus Blaster JTAG debugger / Re: Bus Blaster v4 power up test success, bitstream next
Hello,

I got a Bus Blaster v4 from the Free PCB drawer. I have soldered it together, and I *think* I have successfully programmed the CPLD.

I wasn't able to find a BBv4 bitstream, so I edited the jtagkey buffer ucf file to match the new XC2C64A VQ100 pinout and generated a new SVF file.

I installed UrJTAG 0.10 #2024 from SVN and was able to get it to compile on OS X using
Code: [Select]
./autogen.sh --disable-werror
Next I googled around for a XC2C64a bsdl file; http://http://bsdl.info/view.htm?sid=bf5910466c75c02088ca59b002289d77

and followed the instructions on the http://http://dangerousprototypes.com/docs/Bus_Blaster_v2_manufacturing_resources

The next step seems to be getting the self test to work.

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( ! ) Elk_Exception: Please try again. If you come back to this error screen, report the error to an administrator. in /var/www/dangerousprototypes/forum/sources/database/Db-mysql.class.php on line 696
Call Stack
#TimeMemoryFunctionLocation
10.01232327608session_write_close ( )...(null):0
20.01262459208ElkArte\sources\subs\SessionHandler\DatabaseHandler->write( )...(null):0
30.01262459984Database_MySQL->query( ).../DatabaseHandler.php:119
40.05502598728Database_MySQL->error( ).../Db-mysql.class.php:273