[quote author="rsdio"]The original logic attempts to handle real-time data using USB Bulk mode, and thus it fails most of the time when running at 24 MHz or even half that.[/quote]
Our experiences are different. I think it depends on the computer you connect it to. It has been reliable for me at 24 MHz, even for 10G sample sets. Make sure you have a dedicated USB port that's not sharing controller bandwidth with something else. I'm not saying that using a different USB mode wouldn't be better- as it is, USB bulk mode seems a bit of a hack- but it's been working fine for me.
the link in bearmos' post above shows a scope that looks a little beat up, but maybe usable. We have a somewhat similar-looking model at work. On our unit, the large black cylinder at the bottom can be rotated to switch between a normal and a 2x closeup view; this rotates different objectives into place. If you don't rotate the cylinder to lock fully into place at either end of the travel, you get a confusing "split" view so the two eyes do not form a coherent image. Just rotate it fully, and the image locks into place. I am not saying it's the case there, but it's possible. In any case, basic optical microscopes are not all that complicated. If the lenses aren't cracked or scratched, it can likely be repaired to like-new performance (whatever that was).
I don't know about books, but I found the website fpga4fun.com to be informative. A CPLD is essentially a simple version of a FPGA and the same tools and concepts apply.
If anyone is looking for other inexpensive CPLD dev boards, I just came across this one, using the Altera EPM3064ALC44 which is reasonably fast (> 200 MHz clock) and can use 5V, 3.3V or 2.5V logic levels. The Amani64 board is in the Arduino shield format and is about $24 kit / $32 assy , available here http://www.amani64.com/store/
I've never seen or used this board and have no connection to the vendor, but just wanted to post it since seemed like a useful alternative for a 5V I/O compatible CPLD on a "plug & play" board in case you have an Arduino lying around.
Seems like some China-source wire strippers are using some very different standards for what AWG size is. This photo shows the difference. Note, the "Brand X" stripper does work, it's just the sizes are mislabeled. The hole marked "30" is actually 22 gauge, etc.
Digikey normally gets it right, but this time they shipped me by mistake 2 pcs of PIC16C65B-04I/P which is in a 40-pin DIP pkg. Note, this is a fairly old-school PIC and worse, it is an OTP device (one-time programmable only) so it's not much use for general experimenting- only of use if you have a fully debugged project ready for this target. Does anyone have a suggestion for what I could do with them? (I'd offer to send it to someone, but frankly the postage would be about the same as the value of the item.)
Thanks for mentioning this post on your blog Ian- I also didn't realize basic transmit-only ethernet could be so simple! I had an idea involving small low-power sensors sending data to a remote web site. It's a lot easier to bitbang out some UDP packets than to implement a full interface with ENC28J60 running at 160 mA.
FWIW: I just tried a batch of 10 small (< 5x5 cm) PCBs from Seeed. Nothing fancy, 2 layer 0.062" FR4 with no tight tolerances. The PCBs came in today and they look pretty much like the initial batch of 10 that I got from the high-quality US vendor sunstone.com. The Seeed boards were shipped loose in a ziplock bag, instead of tightly shrinkwrapped as from Sunstone, so one board had the soldermask rubbed off in one place I presume from vibration during shipping. However, they actually shipped me 12 boards instead of 10, so I still got 11 good boards out of the deal.
The Sunstone order (2-day turn) was $375 plus $$ shipping (FedEx overnight) and took 4 days: 2 working days + 1 weekend.
The Seeed order (their "Fusion PCB" quoted at 4-6 day turn) was $30 plus $32.50 shipping (UPS worldwide expedited) Ordered April 8, received April 18 (10 days: 6 working days + 2 weekends)
Note: I asked for 100% electrical test on the Seed order, it would have been $20 otherwise. Also, of course slower shipping would have been cheaper, and they offer free shipping on orders above $50.
I don't know what you consider "cheap". For US$110 you can get a USB "borescope/endoscope" which might be useful for what you want. Someone at work here recently got one, looks like a long silver pen, with a stand, has built-in white LEDs for light. You have have 7 cm working distance at low resolution, down to 1 cm or less working distance at very high resolution. If you want to solder with it, you might want to use a microscope coverslip or other small piece of glass in front to avoid fumes and smoke from fogging the lens.
eheV2-USBplus "eTime home endoscope (new version)" http://www.amazon.com/gp/product/B004O2 ... e=&seller= Resolution: 1600X1200 Interface: USB2.0. Frame rate: 30 frames/sec (CIF and VGA). Focal distance: 5mm - infinity Magnification: 1x - 200× Diameter: 8.2mm Length: 160mm Windows XP, Vista, Windows 7 or MAC 10.4.2 – 10.6.2
this was at a height of maybe 1 cm above the board, as close as is probably reasonable if you want to use this for soldering. Using it at longer working lengths, you get less magnification.
I'm guessing probably nobody really cares, but the two photos at the top of this page http://dangerousprototypes.com/category/cpld/ are reversed. The board labelled XC9572XL is in fact the CoolRunner-II, and vice-versa.
Interestingly, the same two photos in a slightly smaller size are also shown at the top of this forum page, but labelled correctly.
I'm working towards the interpolating time interval counter (sub-ns resolution, hopefully) as I mentioned here: http://dangerousprototypes.com/2011/03/ ... /#comments This would be used to compare phase offset over time, and hence drift rates of high-stability oscillators. That in turn is part of a measurement system still in the conceptual phase.
Very happy to report that my first try at a Coolrunner II CPLD project works! This is the 16-bit timer with start / stop pulse inputs. It is only tested so far up to 4 MHz, using the Bus Pirate as a signal generator (and also doubling as a JTAG programmer- handy tool!). The timing report claims it can go a bit further :-). Thanks DP for the help and the nice CPLD board!
EDIT: By the way, the timing report "Clock to Pad Timing" seems quite a bit slower than my scope measurements, as below. Can the on-chip delays really be 3x less than the timing report says? Or is the timing report just considered an upper bound over temperature, voltage range etc. with some added safety margin? Signal risetime is about 4 ns, although I don't have a fast enough scope to measure it well.
Clock to Dout<15:0>: Report: 8.0 ns scope: 2.6 ns Clock to Carry: Report: 12.5 ns scope: 4.2 ns
EDIT2: one more update. Also works with 50 MHz osc, total current = 13.1 mA at 3.3 V including on-board oscillator and LEDs. Note: I made a slight modification to the PCB backside, cutting the trace between OSC Pins 1 & 4 (ENA/Vdd) and extending the ground plane across it instead, for a better path to the bypass cap. Added external jumper wire from ENA to Vdd, since impedance of that trace doesn't matter. Not sure if it actually made a difference, but seemed like a better layout.
I notice the CoolRunner-II breakout board has provision for a 5x7mm oscillator package on the back side. My design requires a clock source, so I was planning to populate this part. However, the below Xilinx note gives me some concern, since the clock would be running whenever +3.3V is applied. Do I need to break the path feeding my clock signal into CPLD pin 1 whenever I want to re-program? Or, when programming there is only power on the VDD_AUX on the JTAG connector, and not enough leaks into the Vcc pin so the external clock chip would not be running anyway during JTAG programming?
"If free running clocks are delivered into a Boundary-Scan (JTAG) device, it can be necessary to disconnect or disable their entry into these devices during ISP or Boundary-Scan (JTAG) operations."
Ok, the two input flip-flops are clocked only by the two input signals (stop & start), not the CLK line. So they never see the reset pulse, since they aren't clocked at that time. So I want to use a jam-reset type FF for those first two FFs, not synchronous type as I have now.
Realized it just as I went to bed- I need more sleep... ---- Edit: to be more precise, the FF I used was: FDR "Macro: D Flip-Flop with Synchronous Reset" but what I want is: FDC “Macro: D Flip-Flop with Asynchronous Clearâ€
