Dangerous Prototypes Open Source Hardware

You need to understand that LPG is liquid gas and the pressure is almost constant in the tank. Using pressure sensor won't work, until the tank is empty :-)

Could you also change the "EEPROM" to "FUSE" ? it seems that I did some error, and it got copied multiple times.

Response to variations in temperature seems to be slower than a thought.

uint32_t NVMcommands[] = {
	// Prime SRAM
	//Step 1
	  0x3c10A000 // Sram base		//0
	//Step 2
	, 0x3c080000 // data H			//1
	, 0x35080000 // data L			//2
	, 0xAE080000 // offset (inc by 4)	//3
			
	// flash
	//Step 1: Initialize some constants.
	, 0x3c04bf80 //lui a0,0xbf80		//4
	, 0x3484f400 //ori a0,a0,0xf400		//5
	, 0x34050000 //ori a1,$0,0x4001		//6
	, 0x34068000 //ori a2,$0,0x8000		//7
	, 0x34074000 //ori a3,$0,0x4000		//8
	, 0x3c11aa99 //lui s1,0xaa99		//9
	, 0x36316655 //ori s1,s1,0x6655		//10
	, 0x3c125566 //lui s2,0x5566		//11
	, 0x365299aa //ori s2,s2,0x99aa		//12
	, 0x3c13ff20 //lui s3,0xff20		//13
	, 0x3c100000 //lui s0,0x0000		//14
	//Step 2: Set NVMADDR with the address
	, 0x3c080000 //lui t0,<FLASH_ROW_ADDR(31:16)>	//15
	, 0x35080000 //ori t0,t0,<FLASH_ROW_ADDR(15:0)>	//16
	, 0xac880020 //sw t0,32(a0)			//17
	//Step 3: Set NVMSRCADDR with the physical source SRAM address.
	, 0x36100000 // ori s0,s0,<RAM_ADDR(15:0)>	//18
	//Step 4: Set up NVMCON for write operation and poll LVDSTAT.
	, 0xac850000 //sw a1,0(a0)		//19
	// delay (6 us)
	//here1:
	, 0x8C880000 //lw t0,0(a0)		//20
	, 0x31080800 //andit0,t0,0x0800		//21
	//, 0x1500fffd //bne t0,$0,<here1>	//22
	, 0x1500fff4 //bne t0,$0,<here1>	//22
	, 0x00000000 //nop			//23
	//Step 5: Unlock NVMCON and start write operation.
	, 0xac910010 //sw s1,16(a0)		//24
	, 0xac920010 //sw s2,16(a0)		//25
	, 0xac860008 //sw a2,8(a0)		//26
	//Step 6: Repeatedly read the NVMCON register and poll for WR bit to get cleared.
	//here2:
	, 0x8c880000 //lw t0,0(a0)		//27
	, 0x01064024 //and t0,t0,a2		//28
	//, 0x1500fffd //bne t0,$0,<here2>	//29
	, 0x1500fff4 //bne t0,$0,<here2>	//29
	, 0x00000000 //nop			//30
	//Step 7: Wait at least 500 ns after seeing a 0 in NVMCON<15> before writing to any NVM registers. This requires inserting NOP in the execution.
	, 0x00000000 //nop			//31
	, 0x00000000 //nop			//32
	, 0x00000000 //nop			//33
	, 0x00000000 //nop			//34
	//Step 8: Clear NVMCON.WREN bit.
	, 0xac870004 //sw a3,4(a0)		//35
	//Step 9: Check the NVMCON.WRERR bit 
	, 0x8c880000 //lw t0,0(a0)		//36
	, 0x30082000 //andit0,zero,0x2000	//37
	//, 0x1500ffdc //bne t0, $0, <err_proc_offset>//38
	, 0x1500FF64 //bne t0, $0, <err_proc_offset>//38
	, 0x00000000 //nop			//39
};

void program_word (unsigned addr, unsigned word)
{
	uint16_t addrH, addrL, dataH, dataL;
	addrH = addr >> 16;
	addrL = addr;
	dataH = word >> 16;
	dataL = word;

//	if (debug_level > 0)
	{
		fprintf (stderr
		, "stampit2: program word at %04x:%04x %04x:%04x n"
		, addrH, addrL
		, dataH, dataL
		);
	}
		/* Without PE. */
		uint16_t bufferOffset = 0;
		uint16_t c = 0;

		// ram buffer
		fprintf(stderr, "stampIT2: ram buffern");
		// : 0-3
		xferinst(NVMcommands[0]);
		xferinst(NVMcommands[1] | dataH);
		xferinst(NVMcommands[2] | dataL);
		xferinst(NVMcommands[3] | bufferOffset);
		// flash write
		fprintf(stderr, "stampIT2: flash write startn");
		// Step1: 4-14 Init 
		xferinst(NVMcommands[4]);
		xferinst(NVMcommands[5]);
		uint32_t optype = 0x4001;//word write
		//uint32_t optype = 0x4003;//row write 128 words
		//uint32_t optype = 0x4004;//page erase
		//uint32_t optype = 0x4005;//PFM erase
		xferinst(NVMcommands[6] | optype);
		for(c=7;c<=14;c++)
			xferinst(NVMcommands[c]);
		// Step2: 15-17
		xferinst(NVMcommands[15] | addrH);
		xferinst(NVMcommands[16] | addrL);
		xferinst(NVMcommands[17]);
		// Step3: 18
		xferinst(NVMcommands[18] | bufferOffset);
		// Step4: 19-23
		xferinst(NVMcommands[19]);
		usleep(600);
		for(c=20;c<=23;c++)
			xferinst(NVMcommands[c]);
		// Step5: 24-26
		for(c=24;c<=26;c++)
			xferinst(NVMcommands[c]);
		// Step6: 27-30
		for(c=27;c<=30;c++)
			xferinst(NVMcommands[c]);
		// Step7: 31-34
		for(c=31;c<=34;c++)
			xferinst(NVMcommands[c]);
		// Step8: 35
		xferinst(NVMcommands[35]);
		// Step9: 36-39
		for(c=36;c<=39;c++)
			xferinst(NVMcommands[c]);
	fprintf(stderr, "stampIT2: flash write endn");
	return;
}

/*
 * Flash write, 1-kbyte blocks.
 */
void program_block (unsigned addr, unsigned *data)
{
	unsigned nwords = 256;
	unsigned words_written;

//	if (debug_level > 0)
		fprintf (stderr, "stampIT2: program %d bytes at %08xn", nwords*4, addr);

		uint16_t addrH, addrL, dataH, dataL;
		addrH = addr >> 16;
		addrL = addr;
		/* Without PE. */

		uint16_t c = 0;
		// data = 1024 bytes, 256 words
		// row = 128 words
		uint8_t rowCur = 0,rowNeed = 2;
		uint32_t dataOffset = 0, bufferOffset = 0;
		for(;rowCur<rowNeed;rowCur++)
		{
		// ram buffer
		fprintf(stderr, "stampIT2: ram buffern");
			uint16_t wordCur = 0, wordNeed = 128;
			dataOffset += bufferOffset;
			uint32_t* row = data+dataOffset;
			bufferOffset = 0;
			uint32_t rowValid = 0;
			for(wordCur=0;wordCur<wordNeed;wordCur++)
			{
				uint32_t word = *(row+bufferOffset);
				//fprintf(stderr,"	%08x -> %08x <- %08xn",addr+dataOffset+bufferOffset,word,bufferOffset);
				if(word!=0xFFFFFFFF)
				{
					rowValid += 1;
				}
				bufferOffset += 4;
			}
			if(!rowValid)
			{
				fprintf(stderr,"stampIT2: Skipping empty rown");
				continue;
			}
			else {
				fprintf(stderr, "stampIT2: row=%u words=%un",rowCur,rowValid);
			}
			bufferOffset = 0;
			///////////
			// TODO
			// rowValid is a word count
			// write small count as words not rows
			///////////
			uint32_t lastWord = 0;

			xferinst(NVMcommands[0]); // Ram base

			for(wordCur=0;wordCur<wordNeed;wordCur++)
			{
				uint32_t word = *(row+bufferOffset);
				dataH = word >> 16;
				dataL = word;
				if(wordCur==0 || word != lastWord)
				{ // Already buffered only need cmd3
				    xferinst(NVMcommands[1] | dataH);
				    xferinst(NVMcommands[2] | dataL);
				}
				fprintf(stderr,"	%08x -> %08x <- %08xn",addr+dataOffset+bufferOffset,word,bufferOffset);
				lastWord = word;
				xferinst(NVMcommands[3] | bufferOffset);
				bufferOffset = bufferOffset + 4;
			}
		// flash write
		fprintf(stderr, "stampIT2: flash write startn");
			// Step1: 4-14 Init 
			xferinst(NVMcommands[4]);
			xferinst(NVMcommands[5]);
			//uint32_t optype = 0x4001;//word write
			uint32_t optype = 0x4003;//row write 128 words
			//uint32_t optype = 0x4004;//page erase
			//uint32_t optype = 0x4005;//PFM erase
			xferinst(NVMcommands[6] | optype);
			for(c=7;c<=14;c++)
				xferinst(NVMcommands[c]);
			// Step2: 15-17
			xferinst(NVMcommands[15] | addrH);
			xferinst(NVMcommands[16] | addrL);
			xferinst(NVMcommands[17]);
			// Step3: 18
			xferinst(NVMcommands[18] | bufferOffset);
			// Step4: 19-23
			xferinst(NVMcommands[19]);
			usleep(600);
			for(c=20;c<=23;c++)
				xferinst(NVMcommands[c]);
			// Step5: 24-26
			for(c=24;c<=26;c++)
				xferinst(NVMcommands[c]);
			// Step6: 27-30
			for(c=27;c<=30;c++)
				xferinst(NVMcommands[c]);
			// Step7: 31-34
			for(c=31;c<=34;c++)
				xferinst(NVMcommands[c]);
			// Step8: 35
			xferinst(NVMcommands[35]);
			// Step9: 36-39
			for(c=36;c<=39;c++)
				xferinst(NVMcommands[c]);
		}

	fprintf(stderr, "stampIT2: flash write endn");
	return;
}