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Messages - alanh

1
Project logs / Re: Loki: A new PSoC based development board
Since you actually don't use 5V anywhere (except maybe a plank), why not diode or both vbus and the barrel connector into a fixed 3.3V switcher like a TPS62162DSGT?

It would significantly reduce component count and PCB area.
3
Project development, ideas, and suggestions / Re: Tablet controlled DSO
I actually don't understand the concept of strapping a tablet on it.  There is more than enough power in the Zynq PS to both manage sample acquisition and run an Android UI at the same time and much faster and efficiently as well.  If you are going to pay that much for the component costs of everything else, go the extra inch and add a simple lcd+touch screen for $50.  I would much rather run it in stand-alone mode anyway until I have something interesting to look at on bench PC screen.  Especially if Android is built it.  I can just email traces directly.
4
Project development, ideas, and suggestions / Re: Tablet controlled DSO
I don't have enough advanced analog experience to be directly helpful in that domain, so good luck.  I can imagine that much of the premium you pay for the higher end scopes is for experience and quality reputation.  Especially in designing front ends that are resilient to transients and out of limit conditions without stressing silicon or significantly adversely affecting signal integrity.  Even FET probes themselves are essential to high speed analysis and out of most low cost budgetary ranges.

I do have a Zynq eval board, a couple of Zeds, and a few Parallella boards pending from the kick-start.  So I'd be happy to lend a hand in testing and contributing to the digital side of the effort.  At the relative price ranges you are committing to early, hiring out reliable placement of BGAs is reasonable while hand placing the rest of the parts later.

Your suggested starting point is also a great combination for software defined radio applications with a low noise amp on the front end.
5
Project development, ideas, and suggestions / Re: Tablet controlled DSO
XC7Z0x0's aren't cheap in low quantity (and not much less in huge qty).  And are a maximum .8mm BGA so your board will be at least 4 layers and thus fulfillment choices drop.

I have thought about a really cheap really high bandwidth logic analyzer though.  You could use the 7:1 LVDS gearing present in a MachXO2 with an internally sourced reference clock to de-serialize high frequency samplings.  Use a simple leaded 16-bit DDR1 memory device to provided an extended FIFO through the PLD.  Then use a USB 2.0 peripheral capable of a high speed bridging to a 8 or 16 bit FIFO like a FX2 to get the data off fast enough to further extend your capture time.
6
Project development, ideas, and suggestions / Re: Emulate SD, MMC, or XD card with microcontroller
Most SD cards support a SPI mode and in fact must come up in a single wire mode initially and switch to 4 or 8 bit mode after.  So if you advertise single wire only in the card capabilities data, it should be possible to do it with any MCU with DMA driven SPI peripheral.  You could also connect an open drain output to the physical card switch on the socket to emulate a hot unplug/plug when the image data changes.

In theory, perhaps.
7
Project development, ideas, and suggestions / Re: Eagle PCB routing help?
Why replace 1 QFN for another?  There are a lot of buck switchers that come in a variety of leaded packages.

Also note your supply voltage will be 4.3V as is when powered from USB only.  You could raise it a bit with a schottky, but D2 really needs to stay since you have a dual supply.  You don't want current feeding back the wrong way on VUSB.
8
Project development, ideas, and suggestions / Re: Eagle PCB routing help?
Before you even get to routing, consider these suggestions:

1) The ATMEGA32U4 in a QFN has an exposed ground pad.  Your library package is wrong.
2) Why use a QFN when there are QPF package choices available?  QFNs are tricky.  They are best laid down with uniform heat, however if you intend on using an iron, you might consider putting through hole vias below the ground pad and a solder mask relief on the bottom side so you can heat the pad solder from underneath with a blade tip.  Alternatively QFPs are very forgiving to solder.
3) You've somehow screwed up your net names for your supply.  You have two separate nets - 'VCC' and '3.3V' connected to the VCC symbol on your schematic.  Thus they form two distinct unconnected segments - not what you intended I'm sure.  ie. The MCU is connected to the LDO, however all the VCC pins on all the headers are connected to one another and isolated.
4) Why do you have a 1uF cap connected to VUSB on the cable side of the fuse and diode?  It's unnecessary as you have plenty of capacitance fronting the LDO already.  Which itself is also unnecessary but doesn't hurt.
5) The data sheet for your LDO recommends 2.2uF on the output side.  Your 10uF on either side actually violates the USB spec for in-rush current limit (max 10uF total characteristic capacitance).  Eliminate C13 and C10 for one 2.2uF or 4.7uF ceramic
6) You don't have any decoupling caps for the MCU.  Move C3 next to pin 14 and add another .1uF cap next to pin 34.
7) The data sheet for your LDO also recommends a 470pF cap from BP to ground.
8) If you just need low-speed USB (1.5 Mbps), you can dump the external crystal all together.  The internal RC can run the micro full speed and can be calibrated (though will drift slightly w/ temp change).
9) If you need full speed USB, consider using an external discrete oscillator instead.  It costs a bit more, but 2 fewer components to solder.
10) I'm not sure why you explicitly noted max input @ 16V.  Beware if you pull much current at that voltage, that little reg will burn itself right off the board.
11) I2C typically needs external pull ups (~2-6k).
12) The RTC you've chosen includes a reset supervisor.  You could use it to generate the MCU reset and eliminate the external pull up.  Since it's open drain, you could also add an external reset switch.  If not, consider adding a small cap from reset to ground (<= 1uF).  It will cause the voltage at the reset pin to be near zero while the cap is charging from the pull up during start.  The RC forms a basic one shot timer that allows a noise free reset hold at startup.
9
Project development, ideas, and suggestions / Re: Low cost, high speed interconnect between FPGA and PC
For SDR you're going to have to pass the incoming signal through a few roll off filters to isolate the band of interest - either in the analog domain or digital - and if nothing else to filter out any roll over harmonics.  And I can't imagine not doing AGC and FFT as the first stages of the input pipeline.  So you can drop most of the sample data right there.  Should help on requirements.

You could use HDMI, however the HDMI diff pairs are connected to standard IOs on that board and not serdes interfaces. So you are restricted to the io buffer rate of a Spartan 6.  It might be fast enough of you use builtin gearing with a couple cables with 4 lanes each.  But you would have to build the other end too as it would look nothing like TMDS.  And there is just no way you could clock a HDMI video standard with enough pixel payload capacity to move the ADC data as an image with just standard IO buffers (at full 3gbps).
10
Project development, ideas, and suggestions / Re: Low cost, high speed interconnect between FPGA and PC
What ADC are you talking about?  One that you added?  And how does it interface to the Altys board?  The only thing I can imagine from what you are describing is something that does 250MHz/12 bit - ish. From the description I'm reading, there is nothing on that board already that runs aywhere near that fast.

Even the DDR2 memory interface running that fast in a full duplex FIFO is a bit theoretial.  That alone is a clock/data rate of nearly 250/500 MHz.

As far as a lowest cost solution that would come close to what you describe is to mount a FPGA with a proper serdes on a PCIe card.  Or perhaps add one or more FX3s to the board.  But even the parallel interface speeds required by those solutions will require an integrated board to meet signal integrity.
12
Project development, ideas, and suggestions / Re: [Project Idea] POST card
I think MiniPCI and MiniPCIe are out.  AFAIK those standards spec a different PCB thickness (!= 62mil) and thus a different stackup than stock FR4.

The meanings of the POST codes can also vary by vendor.  So building that into a MCU might be tough.

I'm not sure what you mean by USB or LPT.  It's unclear where either of those interfaces fit in.
14
Project development, ideas, and suggestions / Re: STM32F4 Debug Board v1.0 DP6037
I don't see a way for one to set the two boot pins.  That's one of the most overlooked features of any STM32 board and in my opinion makes it worthless as a eval board.

DFU mode gives people a way they can download code to it without using a SWD probe.

RAM mode allows one to download code to memory and perform quick turn-around iterative testing without having to re-write the flash each code change.  Very useful when combined with a probe and GDB - just 'load foo_ramlinked.elf' & 'run'!
15
Project development, ideas, and suggestions / Re: Long distance wired data comms
Minus the power requirement, you could implement a serially chained connection scheme as well where each unit serves as an active relay to each unit down stream of it.  If the message ID received is not for the given unit, it retransmits it out a matched out-bound port, etc.

Considering the power requirement, there are a number of mid-range MCUs that have Ethernet.  Not sure what your infrastructure budget is, but a PoE switch would be ideal.

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