that's right but irq 5 and 7 are also used for LPT port 1 and 2.
but i also removed the irq jumper so the adapter wouldn't use any irq at all but that made no difference. actually the irq jumper goes strait from the harddisk to the mainboard.
But because this is an XT card you cant use any irq above 7, except irq 9 if you use an AT pc with uses the irq 2 line on the slot for irq 9.
I have tested the board today and it didn't go well :(
First i started the pc without the board to see if it can boot from a floppy, that went well.
Then i placed the board in the expansion slot and started the pc, no smoke :p but the bios came up with an error that the system setup was changed ? The error was that both serial ports, the parallel port and the floppy controller were just gone :( so nowhere to boot the pc from.
Ok thats a big problem, next to see if the XTIDE bios worked so i placed the eeprom in an ethernet card as bootrom, ok now i can see the XTIDE bios :)
Back to the XT-IDE adapter with is made up of two parts, the BIOS with address decoder and the IDE interface itself.
To test if the bios and address decoder worked i placed a bit of tape over the read/write pins to the IDE interface so it was disabled, now i can still see the XTIDE bios on the XT-IDE adapter and i got my ports and floppy back :)
So the error was in the IDE interface part of the board, i went back to the CPLD because i had a bit of a issue connecting the address decoder with haves two bus connections and the rest of the circuits haves individual nets with other names.
To see if the problem was with the address decoder i replaced the Xilinx macro with an 74x521 symbol with don't haves bus connection but individual pins.
Everything synthesizing fine and i tried to put it in the CPLD with UrJTAG and a FT2232 interface but UrJTAG gave an error at 99% :(
So i removed the tape from the XT-IDE adapter hoping it might work now, the pc started the same as with the tape on the adapter, first came the mainboard bios an the the XTIDE bios, the XTIDE bios was scanning the address where the XT-IDE adapter with harddisk should be, but found nothing :(
I went to the wiki of the original project to see if both schematics were the same, with they are. Also on there wiki is an zip file with some utilities for the XT-IDE adapter, but those utilities also didn't find the IDE interface :(
So i think that the CPLD didnt program right or that there is still something wrong with the sources.
Because i don't have another programmer at home i have to wait until monday to program the CPLD with the official Xilinx programmer to see if that will make things work.
The difference between the boards is an extra 3.3V regulator in the top left corner next to the CPLD. v1a is 3.3V and v1 is 5V, they both have Sep-2010 on them.
So if you PCB haves an regulator there you need an 3.3V CPLD (XC9536XL or XC9572XL) and the regulator. If its not there you only need the 5v CPLD (XC9536).
The EEPROM i programmed with a cheep universal programmer from eBay, but it should be possible to program it on the pc with the tools from XTIDE Universal BIOS.
Today i finished building the XT-IDE adapter v1a PCB, the jumpers where a bit hard to do but everything is on the board now and the CPLD has been programmed. Tomorrow i will test the board, the PC needs some fixes first.
[attachment=0] For the next PCB design i would be nice if the onboard activity led and the external one get a separate series resistor so they are not directly connected in parallel.
Also the IDE connector could be rotated 180° so a normal angled connector can be used instead of the one i used where i manually flipped all the pins around.
And if we are messing with the IDE connector we could connect pin 20 to 5V so a disk on module can be powered from this pin directly.
Today i ordered the last parts from farnell so i haven't been able to test it yet, i hope to get the missing parts tomorrow so i can test everything this weekend.
I also need to replace the CMOS battery on the mainbord because it have been leaking.
I just put two screenshots of the PCB's showing the disconnected traces in the SVN. 5V v1 screenshot with 7 unrouted traces. 3V3 v1a screenshot with 5 unrouted traces.
edit: On the 5V v1 PCB you also need to connect pin 17 and 25 of the CPLD to the ground plane, this didn't show on the eagle screenshots. So the total unrouted traces on the manufactured PCB is 9.
