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Bus Blaster JTAG debugger / BUS BLASTER REV 4 (future improvement)
(sorry for the formatting)
Congratulations, Dangerous Prototypes are the only ones that have connected
ALL the FT2232 lines to a logic device (CPLD in your case)
This means that the BUS BLASTER REV 4 could let the FT2232 to operate in
HOST Emulation mode if a connection is changed (read below) and a CPLD code is developed…
If a CPLD code is developed for interfacing to FTDI HOST Emulation mode,
functionality will still be somewhat limited due to the limited capacities of the CPLD (macro cells)
Not many registers can be made with only 64 flip-flops ....
Current NETs:
FTDI side : CPLD side
BD5 pin 44 (HOST Emu mode CLOCK 60Mhz) = pin 35
BC4 pin 55 = pin 24 GCLK1
BC5 pin 57 = pin 22 GCLK0
AC5 pin 27 (245 FIFO sync mode CLOCK) = pin 24 GCLK2
FTDI BD5 pin 44 (HOST Emu mode CLOCK 60MHz) needs to go to a GCLK of CPLD
PROPOSED changed NETs:
FTDI side : CPLD side
BD5 pin 44 (HOST Emu mode CLOCK 60Mhz) = pin 22 GCLK0
BC5 pin 57 = pin 35
This would be done by swapping connection on the FTDI side pin 44 and 57
For the moment I will hot wire the change to use FTDI HOST Emulation mode
Regards
Martin