Dangerous Prototypes Open Source Hardware

m
1. HiZ
2. 1-WIRE
3. UART
4. I2C
5. SPI
6. 2WIRE
7. 3WIRE
8. LCD
x. exit(without change)

(1)>5
Set speed:
 1. 30KHz
 2. 125KHz
 3. 250KHz
 4. 1MHz

(1)>4
Clock polarity:
 1. Idle low *default
 2. Idle high

(1)>1
Output clock edge:
 1. Idle to active
 2. Active to idle *default

(2)>2
Input sample phase:
 1. Middle *default
 2. End

(1)>1
CS:
 1. CS
 2. /CS *default

(2)>2
Select output type:
 1. Open drain (H=Hi-Z, L=GND)
 2. Normal (H=3.3V, L=GND)

(1)>2
Ready
SPI>W
POWER SUPPLIES ON
SPI>[0
/CS ENABLED
WRITE: 0x00
SPI>r
READ: 0x08
SPI>r
READ: 0x08
SPI>r]
READ: 0x08
/CS DISABLED
SPI>[0rr]
/CS ENABLED
WRITE: 0x00
READ: 0x08
READ: 0x08
/CS DISABLED
SPI>[1r]
/CS ENABLED
WRITE: 0x01
READ: 0x3F
/CS DISABLED
SPI>[2r]
/CS ENABLED
WRITE: 0x02
READ: 0x03
/CS DISABLED
SPI>[3r]
/CS ENABLED
WRITE: 0x03
READ: 0x03
/CS DISABLED
SPI>[4r]
/CS ENABLED
WRITE: 0x04
READ: 0x03
/CS DISABLED
SPI>[5r]
/CS ENABLED
WRITE: 0x05
READ: 0x02
/CS DISABLED
SPI>[5r]
/CS ENABLED
WRITE: 0x05
READ: 0x02
/CS DISABLED
SPI>[0x25 100]
/CS ENABLED
WRITE: 0x25
WRITE: 0x64
/CS DISABLED
SPI>[5r]
/CS ENABLED
WRITE: 0x05
READ: 0x64
/CS DISABLED

void initI2C(void)
{
	
    // init I2C slave, 7bit address, 100KHz
    
	 SSP2BUF=0x00;           // clear buffer
    SSP2STAT=0x80;          // 100KHZ
    SSP2MSK=I2CADDMASK;     // and mask; this will allow multiple instances
    SSP2CON1=0x36;           // SSP1EN|!clockstretching|7bit mode /w int
    SSP2CON3|=0b11000000;
}


// main loop + statemachine
// EEPROM
void I2CEEworker(void)
{	unsigned char token, addr, temp, addressed,ff;

	addr=0x00;
	addressed=0;
	
		
    SSP2ADD=I2CADDEE;		// Set slave addres
		SSP2CON1bits.SSPEN=1;
    while(1)
    {
        //i2c state machine
        if(SSP2IF)
        {	
				token=SSP2STAT&I2CSTATMASK;

            if(SSP2STATbits.S)				// start condition
				
            {	
					LED1ON;
				
					switch(token)
                {
                    case MWA:               // master write address
                        temp=SSP2BUF;		// temp holds I2Caddress
                        break;
                    case MWD:               // master write data
                        if(!addressed) 
								{	
									addr=SSP2BUF;
									addressed=1;
								}
								else
								{
									eeBuf[addr++]=SSP2BUF;
								}
                        break;
                    case MRA:               // master read addres
                        temp=SSP2BUF;
								I2CWrite(eeBuf[addr]);
								break;
                    case MRD:               // master read data
                        if(!addressed) 
								{	
									temp=SSP2BUF;
									I2CWrite(eeBuf[addr++]);
									addressed =1;
								}
								else
								{
									I2CWrite(eeBuf[addr++]);
								}
                        break;
                }
            }
            else if(SSP2STATbits.P)			// STOP condition
            {	LED1OFF;
					addressed=0;
                asm("NOP");
            }
            SSP2IF=0;
            //SSP2CON1bits.SSPEN=1;
            /*if(token!=MRD)*/SSP2CON1bits.CKP=1;				//release SCL line
        }
    }
}


// outputs a byte on the bus and releases the clk line
void I2CWrite(unsigned char c)
{	
    do
    {
        SSP2CON1bits.WCOL=0;
        SSP2BUF=c;
    } while(SSP2CON1bits.WCOL);
    SSP2CON1bits.CKP=1;						// release SCL line
}

        #pragma config UPLLEN    = ON        // USB PLL Enabled
        #pragma config FPLLMUL   = MUL_20        // PLL Multiplier
        #pragma config UPLLIDIV  = DIV_2         // USB PLL Input Divider
        #pragma config FPLLIDIV  = DIV_2         // PLL Input Divider
        #pragma config FPLLODIV  = DIV_2         // PLL Output Divider
        #pragma config FPBDIV    = DIV_1         // Peripheral Clock divisor
        #pragma config FWDTEN    = OFF           // Watchdog Timer
        #pragma config WDTPS     = PS1           // Watchdog Timer Postscale
        #pragma config FCKSM     = CSDCMD        // Clock Switching & Fail Safe Clock Monitor
        #pragma config OSCIOFNC  = OFF           // CLKO Enable
        #pragma config POSCMOD   = HS            // Primary Oscillator
        #pragma config IESO      = OFF           // Internal/External Switch-over
        #pragma config FSOSCEN   = OFF           // Secondary Oscillator Enable (KLO was off)
        #pragma config FNOSC     = PRIPLL        // Oscillator Selection
        #pragma config CP        = OFF           // Code Protect
        #pragma config BWP       = OFF           // Boot Flash Write Protect
        #pragma config PWP       = OFF           // Program Flash Write Protect
        #pragma config ICESEL    = ICS_PGx1      // ICE/ICD Comm Channel Select
        #pragma config DEBUG     = OFF            // Background Debugger Enable
        #pragma config JTAGEN    = OFF            // JTAG Disabled
        #pragma config FUSBIDIO  = OFF
        #pragma config FVBUSONIO = OFF
        #pragma config PMDL1WAY  = OFF
        #pragma config IOL1WAY   = OFF

    #define CLOCK_FREQ 40000000
    SYSTEMConfig(CLOCK_FREQ, SYS_CFG_WAIT_STATES |  SYS_CFG_PCACHE); 
    mJTAGPortEnable(DEBUG_JTAGPORT_OFF); 
    INTEnableSystemMultiVectoredInt();
    ANSELA = 0x0000;
    ANSELB = 0x0000;