1
Bus Blaster JTAG debugger / Re: Getting Bus Blaster V3c Working & v4.1
1. Download urJTAG vn 0.10
2. Download BusblasterV3.zip download/file.php?id=7756
3. Install urJTAG into default Program Files(x86) directory
4. Find file jtag-rev11.exe in zip file and copy it into the same directory that jtag.exe is in (as per step 3)
5. Use file explorer to fing jtag-rev11.exe, right click and chose 'run as administrator' - a command prompt should open with the JTAG start up messages.
6. At jtag> prompt, type 'cable jtagkey interface=0' - you should get a message about FT2232xx cable being used
7. With target connected, type 'detect' at jtag> prompt
[/quote]
The above also functions for V4 under XP 32 bit, only issue is ensuring you have the 'multitude' of files scattered about for the part & an entry in 'parts' to ensure it decodes correctly.
Code: [Select]
UrJTAG 0.10 #1869
Copyright (C) 2002, 2003 ETC s.r.o.
Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors
UrJTAG is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
There is absolutely no warranty for UrJTAG.
jtag.c:518 main() Warning: UrJTAG may damage your hardware!
Type "quit" to exit, "help" for help.
jtag> cable jtagkey interface=0
Connected to libftd2xx driver.
jtag> detect
IR length: 10
Chain length: 1
Device Id: 01110010101011010110000010010011 (0x72AD6093)
Manufacturer: Xilinx (0x093)
Part(0): XC5VLX110T_FF1136 (0x2AD6)
Stepping: 0111
Filename: c:program filesurjtagdata/xilinx/XC5VLX110T_FF1136/XC5VLX110T
_FF1136
jtag> scan
IO_A14: 0 > 1
IO_A16: 0 > 1
IO_B17: 1 > 0
IO_C15: 0 > 1
IO_C17: 0 > 1
IO_D15: 1 > 0
IO_D17: 1 > 0
IO_D20: 0 > 1
IO_E19: 0 > 1
IO_M33: 1 > 0
IO_R28: 1 > 0
IO_R29: 1 > 0
IO_V32: 1 > 0
IO_V33: 0 > 1
IO_V34: 0 > 1
IO_W34: 1 > 0
IO_AE32: 1 > 0
IO_AE34: 1 > 0
IO_AF33: 1 > 0
IO_AH34: 0 > 1
IO_AJ14: 1 > 0
IO_AJ19: 1 > 0
IO_AJ34: 1 > 0
IO_AK19: 1 > 0
IO_AK24: 1 > 0
IO_AL23: 1 > 0
IO_AM15: 1 > 0
jtag> scan
IO_A14: 1 > 0
IO_A15: 0 > 1
IO_A16: 1 > 0
IO_C17: 1 > 0
IO_D15: 0 > 1
IO_D16: 0 > 1
IO_D17: 0 > 1
IO_D20: 1 > 0
IO_R28: 0 > 1
IO_R29: 0 > 1
jtag>
All in all, the setup is like being punched in the face with a brick, I had to do an exit of the program and a 'cable' 3 times before it finally detected correctly, but after that it was solid with no problems.
I suspect that it's one of those things where if everything is started fresh it is easier.
I had far better luck and setup with 'topjtag' which went straight in used the bus-blaster plus it only requires the FPGA BDSL file to work first time.
I would like to try and reprogram the V4 with the 'picotap' image (to test 'gojtag'), but there is no mention on this site if the 'picotap' image will work without modification on the V4 board or will crash and burn.