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Messages - iens

2
Open Bench Logic Sniffer / Re: Replace PIC
I read manual of FPGA and the constraint file of Logic Analyser. I saw which pins of spi PROM  and SPI route doesn't match. In file source of PIC, we can choose the older or newer SPI connection.
If I choose the newer SPI connection, do I must change constraint file?
3
Open Bench Logic Sniffer / Re: Replace PIC
So, I could use port A in SPI mode to connect a FT2232D, FPGA and ROM but there is an other signal betewen PIC and FPGA: DataReady. Is it useful to use this signal?
And use port B in JTAG mode to configure FPGA or program ROM across FPGA.
Sorry for my questions but I have a FTDI chip in stock and I would like use it. Your project Logic Analyser in very good and very usefull.
4
Open Bench Logic Sniffer / Re: Replace PIC
With the new version of FPGA (Demon Core), In the Verilog Files there are serveral files (spi_slave.v, spi_tranmitter.v, spi_receiver.v) to dialog in SPI mode between FPGA and PIC or transfert data captured by probes. It's right? Or it's use the serial line ? (files eia232.v, transmitter.v, receiver.v and prescaler.v).
(Sorry for my english)
I saw that PAPILIO ONE is compatible with SUMP to do a logic analyser and it use a FTDI chip between USB port and FPGA. Could I do the same ?
Thanks
5
Open Bench Logic Sniffer / Replace PIC
Just for information, can I replace PIC with a FTDI Chip (FT2232H) in SPI mode ?
I would like doing this board but I haven't a PIC Programmer. So I would like replace it.
Thanks

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