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Messages - victzh

2
Project development, ideas, and suggestions / Re: Learning FPGAs (Verilog to be specific)
I built a couple of FPGA/CPLD boards - DP's XC9572XL and my own redesign of Altera-based Kemani. I also build Papilio Kit with 500K Spartan.

I used mainly Papilio (as an OLS equivalent, with varying success) and Kemani clone.

The first projects is pretty easy - to debug Papilio I used Altera to generate various signals for it ranging from 32MHz down to several KHz. It actually reveals something about sensitivity of neighboring wires at high speeds - they better be interleaved with GND wires as is done in, e.g. IDE.

The next project is more interesting - it is boost converter on small Altera CPLD (this same tried and true Kemani clone). I put together several discretes in typical boost configuration driven by signal from CPLD. I study how duty cycle influence the resulting parameters and plan to provide feedback to have a full customizable and probably reconfigurable converter.

This converter project revealed for me how different is logic design from programming. Where in programming you think in function calls (or method calls in OOP) in design you need to instantiate stuff.

I also chose Verilog as less verbose and more C-like (as opposed to Ada-influenced VHDL).
3
Project logs / Free PCB Bus Blaster and XC9572 board builds
I built sometime ago both Bus Blaster and XC9572 boards and successfully used Bus Blaster to program the XC9572 and my own Kemani clone based on Altera EPM3064.

I faced with couple of problems with these builds. Bus Blaster using resistor arrays makes it pretty complicated to fix soldering defects - I use frying on the griddle method (to lazy to solder all these small pitch chips), but some amount of solder bridges is inevitable. While finding and removing these bridges is pretty easy on TQFPs, surprisingly it is not so with small resistor network - it is sometimes easier to desolder it altogether than to remove bridges.

Another problem was with XC9572 board - I have an older version, which incorrectly routed one of the I/O pins to VCCIO. I did not mount a capacitor on this pin, and fortunately was able to cut the trace on the back so I can use the pin (which is still marked as VCCIO) and use another, real VCCIO to power IO bank.

Bus Blaster, still without connector


XC9572 being programmed


Probably you can see the cut trace on the back in the middle of "Fullfillment by: Seeed Studio"


Programming of XC9572 being watched by http://http://www.gabotronics.com/product-info/the-xprotolab.htm
4
General discussion / Re: A handful of DP
So what specifically do you have?

I built: Bus Blaster and CPLD board from DP free PCB, MCP2200 - slightly modified design which uses 5th pin on USB to flash it, I missed Bus Pirate 4, so I'm waiting for the board (version 4c, slightly modified) from Laen. I also missed Part Ninja, but you (Brent) is gonna send me your AVR version.

I built several things from DP's friend - Gadgetfactory. I have Papilio board, and made narrow version of buffers for it.

I also built Arduino Nano and my own Atmega U2 board (couple of versions, last one is very close to Teensy 1.0).

I also have a version of Kemani - Altera's CPLD board.

I have plans for that mentioned Bus Pirate 4 board, XuLA FPGA board, and FT2232H Wing (slightly modified).
6
Project logs / Re: Cheap USB to UART coverter IC
Have you considered using PIC18 with USB controller AS a main CPU/MCU for your project? As far as I understand, it is quite popular, particularly because of this. Atmel has several AVRs with USB controller also: atmega*u2 and atmega*u4 for instance.
7
Project development, ideas, and suggestions / Re: Sub GHz radio
I have some experience with cc1111 - 900Mhz radio with USB. I made a board, almost a clone of TI's own EZ430 Chronos dongle on a thicker board (1.6mm instead of 0.8) with some extra pin broken out. When loaded with TI firmware, the board works. I did not measure signal intensity, though.

Joby Taffey reported positive experience with cc1110 from IM-ME. The corresponding board (if you not gonna butcher your IM-ME) can be made reasonably cheaply (BOM) but a bit labor intensive - soldering 0402 is no picnic. Even placing many of them for hot plate soldering is dubious joy.
8
Project development, ideas, and suggestions / Re: Sub GHz radio
[quote author="matkey"]Might be worth looking at the TELRAN radio chip from Toumaz (will have to google it as im a new forum user and it understandable doesnt let me post URLs)[/quote]

Absolutely no price info on the site, meaning they'll try to upsell you, meaning non-hobbyist friendly. I don't like private prices, and when I see "Call for price/more info" I usually quit.
9
Project logs / Re: SILtheDIL
I implemented something similar sometime ago for my own board. It is 100mil to 300mil adapter, bottom left on this picture:




The boards standing in adapter on the breadboard:

10
Bus Blaster JTAG debugger / Re: Help needed: self-test application
Ian, is the new buffer code in SVN? I took a look at Bus_Blaster/buffer_logic and can not find a reference to P28 in .ucf files, which shows that it's not there. I need a source code, because in a strike of stupidity I put xc2c64a into free PCB of BusBlaster 2.1a you sent me.

I can not make it work, after rebuilding the stock JTAGKEY buffer logic for xc2c64a target I am able to flash it successfully to the CPLD (using urjtag binary I got from your site), but BusBlaster refuses to work as a JTAGKEY, reporting as follows:

jtag> cable ft2232 interface=1
Connected to libftd2xx driver.
jtag> detect
IR length: 8
Chain length: 1
Device Id: 00000110111001011110000010010011 (0x06E5E093)
  Manufacturer: Xilinx (0x093)
  Part(0):      XC2C64-VQ44 (0x6E5E)
  Stepping:    0
  Filename:    c:appsbusblaster.v2data/xilinx/xc2c64a-vq44/xc2c64a-vq44
jtag> svf BBv2-JTAGKEY-v1.3-xc2c64a.svf stop progress
Parsing  1210/1217 ( 99%)
Scanned device output matched expected TDO values.
jtag> cable jtagkey
Connected to libftd2xx driver.
jtag> detect
discovery.c:117 urj_tap_detect_register_size() Warning: TDO seems to be stuck at 1
Error: parse.c:208 urj_parse_file() no error: Cannot open file 'C:Usersvic/.jtag/rc' to parse

When I connect TDO to TDI making empty chain, it tells different thing, probably not an error at all:
jtag> detect
Error: parse.c:208 urj_parse_file() no error: Cannot open file 'C:Usersvic/.jtag/rc' to parse


The target works fine, it's another of free PCB builds - XC9572 breakout board - and it works with Altera USBBlaster clone with the same urjtag binary I use for these experiments. Another target, my Kemani board clone (Altera CPLD), also works fine USBBlaster, so the test targets are OK.

Any help with debugging it is greatly appreciated.
12
Bus Blaster JTAG debugger / Re: Bus Blaster v2.1a free PCBs
Ian, to clarify the resistor on V_TARGET - you wrote it should be 5-10 Ohm, but on schematics for both 2.1a and 2.6 it's marked as 100Ohm, and in 2.6 it is bigger size, probably meaning bigger wattage - 1206 instead of 0805. What is correct value range for it actually?
14
Project logs / Re: SMT version of Ladyada's (Conway) Game of Life
Purple is thanks to Laen's exquisite taste!

Now juggling LED lighting code and transmission - they both seems to be time critical, so need to use timer interrupt extensively.

I have many very small designs, some are insanely dense so it is pretty hard to populate by hand. I still plan to publish them all - it is not my strongest side so far. To design and program is much more interesting.

As an example of another SMT redesign - http://majolsurf.net/wordpress/?p=1582
15
Bus Blaster JTAG debugger / BBv2 partlist?
Ian, couple questions on the part list.

What specific 12MHz crystal do you use? And what is the source for shrouded connector?

Will it work if I replace XC2C32 with XC2C64?

Thanks,

Victor.

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