I downloaded and builded the svn version of urjtag, and I found some significant changes related to Bus Blaster, which appear as a ft2232 cable. Related to this the source file ft2232.c in the 0.10 version has 61208 bytes and is from 2009-04-12, and in the svn version has 90305 bytes and is from 2012-09-19.
They are many changes, like the new jtag executable in my case is only 6232 bytes vs the 0.10 jtag of 2153838 bytes, because the new is based on libraries (I must to execute before use it the first time ldconfig, to add to the system the new libraries)
My Clarion CZ500 came up with an error that said "MCU UPG", drained my battery over the weekend, and now it won't turn on. I buyed the first time a ulink2 interface, but it only works with the keil software, and is useless to reflash a firmware with a jffs ramdisk image, because it has not the image option. I see on the schematics from the service manual of the stereo, that the section of the principal MCU of the 2 cores, is a development of MCSLOGIC, based on a ARM7TDMI, and other 32 bits DSP, the BX8805, equivalent to the MLC3895: http://clubimgfile.paran.com/dig/bbs/20 ... _V1.02.pdf
I see on the online documentation from the mcslogic website a procedure to create a new firmware (uCLinux initrd):
1) Run “sysconf set” 2) TFTP setting (Refer to Environment Setting) 3) Write “root=/dev/mtdblock2” at Root Device Setting item 4) Select “OFF” at NFS Setting item 5) Move created JFFS2 image to TFTP home directory 6) Change the JFFS2 image name into “jffs2.image” 7) Move created compressed kernel image to TFTP home directory. 8) Change the compressed kernel image into “mcs.gz.jffs” 9) Run “flash prog jffs ” (for recorde to flash device) 10) Run “boot flash”
But I do'nt found what software are using to this procedure.
The flash memory of the board is a SST39VF1601.
You can tell me how is the procedure to write the firmware to the Flash memory via JTAG, with openocd?
I selected on the config board for openocd the lpc2294, which uses the arm7tdmi, and edited one config file,to add the external flash SST39VF1601, which is present on some boards like the LPC2294, or the Samsung S3C44B0, but in the boards files from openocd the nearest model of Samsung is the S3C4510, which has no one line to setup the flash memories, internal and external.
I tryed with the command "flash write_image firmware.mcs 0x00400000" (the address from the start of the external flash SST39VF1601). The boot file is in the internal flash of the mcu of 256 Kbyte.
They are a similar model of Clarion, the CZ501, which uses the same MCU than the CZ500, and it uses 2 firmware files: *CZ501MCU.BIN (129kB) *AUDIO_v2x_V101_CZ501_MXIC_110125_00_375K.mcs (1,585kB) http://www.clarion.com/ca/en/support/so ... index.html
I tryed to write the littler file which appear as the boot file with:
flash write_image /root/CZ501MCU.BIN 0x00000000 Verification will fail since checksum in image (0x20282024) to be written to flash is different from calculated vector checksum (0x3f482590). To remove this warning modify build tools on developer PC to inject correct LPC vector checksum. ThumbEE -- incomplete support target reentered debug state, but not at the desired exit point: 0xfffffff9 lpc2000 prepare sectors returned -1571637640 error writing to flash at address 0x00000000 at offset 0x00000000 in procedure 'flash'
If I could write at least the boot file to the internal flash, later with the assembled device, I could load the rest of the firmware via USB.
I do'nt know if the error is related to a hardware problem in the interface: viewtopic.php?f=37&t=4754 Or is other error. When I tryed to write or see the external flash, I got this error: flash probe 1 Flash Manufacturer/Device: 0xffff 0xffff Could not probe bank: no QRY Try workaround w/0x555 instead of 0x55 to get QRY. Could not probe bank: no QRY auto_probe failed in procedure 'flash'
Any time I want to use urjtag with Bus Blaster JTAG debugger V 2.5, I got the same error:
TDO seems to be stuck at 1
If I try with openocd, the problem is similar:
openocd -f /etc/openocd.cfg Open On-Chip Debugger 0.7.0-dev-00066-gfc302a0 (2012-11-04-18:45)
Info : only one transport option; autoselect 'jtag' adapter speed: 500 kHz none trst_pulls_srst Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different. trst_and_srst trst_pulls_srst srst_gates_jtag trst_push_pull srst_open_drain adapter_nsrst_delay: 100 jtag_ntrst_delay: 100 adapter speed: 1500 kHz Info : max TCK change to: 30000 kHz Info : clock speed 1500 kHz Error: JTAG scan chain interrogation failed: all ones Error: Check JTAG interface, timings, target power, etc. Error: Trying to use configured scan chain anyway... Error: lpc2294.cpu: IR capture error; saw 0x0f not 0x01 Warn : Bypassing JTAG setup events due to errors Info : Embedded ICE version 15 Error: unknown EmbeddedICE version (comms ctrl: 0xffffffff) Info : lpc2294.cpu: hardware has 2 breakpoint/watchpoint units Warn : ThumbEE -- incomplete support
