Please don't see this as a rant post, even though it may be a little. I am wondering: does anybody here have a working Bus Blaster 4.1a (Jul 2012)? If so, please share the details of what you did to make it work. I have been trying to operate mine under Windows 7 - 64 bits with no luck so far. I have installed/reinstalled the latest FTDI drivers. Used the latest urJTAG with the modded (v11) version for the interface=0/1 option. It passes self-test consistently, it always programs the internal buffer normally (with BBv4-JTAGkey-selftest-v1.1.svf), but that's it. Once I get it connected to a target it gets TDO either stuck at 1 or 0, depending on which target I connect. I am at the point of giving up and start using it as a simple CPLD prototype board (to which I don't have any use). So, please, if anybody is using this specific device successfully, share the details of your setup. Which O.S., which driver, cable setup, etc. I will be much appreciated. Please answer only if you are using the v4.1a, as it seems people is being able to use the v2 successfully.
I am going bananas on this one. Maybe someone can help me before I jump out the window. I am using the following setup: . Windows 7 64 bits . Bus Blaster v4.1a . uRJTAG 0.10 (.exe replaced by the hacked one) Here's a list of the things that are working fine: . The BB board enumerates normally and I can see it on usbview . I am able to program the internal xilinx buffer by using uRJTAG and setting jumper to "Update Buffer" (I have programmed the board with the BBv4.svf) . The board passes self test by putting all the necessary jumpers in (green-ish LED turns on)
Now some more background information: I am trying to detect/program an AVR XMEGA using this board. I am using JTAG, not PDI. This AVR XMEGA board is detected correctly using a USB Blaster under QuartusII programmer. Every time I try to detect the board with BB I get the infamous "TDO seems to be stuck at 1". I have tried to detect different boards which also detect normally with USB Blaster. Without success. I have tried detecting the Xilinx FPGA on my Open Bench Logic Sniffer, also without success. I have these cables going to the AVR board (which is powered by the BB): BB AVR VTG->3.3V GND->GND TDI->TDI TMS->TMS TCK->TCK TDO->TDO
So at this point I have a few questions: 1 - By passing self test and programming the buffer did I rule out hardware issues on the BB? 2 - Would the BB work with AVR over JTAG? (3.3v - I powered the AVR from the BB with J4 on) 3 - Is there any latest/bleeding edge BB4.1a image I could try? 4 - Maybe I did something wrong with my cabling? 5 - Is the meaning of life really 42?
