That was my first try. After power-up I got some values somewhat random( like 0xff, 0xc0) , but the second read always gave 0x00, so I couldn't. I'm wandering if I've set up the BP correctly: the ADS spec is CPOL = 0, CPHA = 1, so SPI(125kHz, Idle low clock polarity, Active to Idle edge, input sample on middle, /CS, normal operation) and for ID I used the command { 0x20 0 0].
I saw that the IC contains differential ADCs, but there is a routing matrix before the PGA, and the terminals can be routed to a comon pin like SRB1/SRB2. But The connection of the ADC should not interfere with configuring the registers through SPI. That's where my setup fails for some reason, and to be clear, when using BusPirate, I connect a resistor to PWDN and supply, so that's not an issue.
Hi everyone! I'm designing an FPGA based data acquisition system with ADS1299 analog front-end. I made a prototype board for the ADS1299 (see attachment), and I wanted to test the IC with the Bus Pirate v3.8. After SPI configuration I only get 0x00 MISO signal or some random data. To connect the board and the BP I'm using the cables from the Cable Sample Pack, and I've already tested all the available SPI frequencies. Please help me configure the ADS1299 IC. Any help would be appreciated!
Thanks in advance.
PS.: Now I'm home, and I don't have an oscilloscope, so that option is not available until I go to the university.
I've finally received the components needed(in 3 packages) from FARNELL, so I could build my Bus Pirate v3.8. So far I tested the SPI and I2C communications with ChipKit MX4 PRO board and Basys 2 FPGA board. It's a really cool little device. Thanks Ian for the board.
It seems I have to build an FT2232 based JTAG programmer, since I could not find the problem on my own, and I'm too far away from my university to get a Xilinx platform cable to test.
Hi everyone! Today I managed to put together my Bus Pirate v3.8, and I wanted to test it with a Spartan6 FPGA board from NUMATO (Waxwing, XC6SLX45 FPGA - which is also new). I could configure the Bus Pirate as JTAG Programmer, and I generated the xsvf file in Impact, but when I tried to download to the chip I got overflow error. It gives this ( picture attached) error every time I try to download the program. Since this is the first time I'm using FPGA without on-board programmer I have no idea what to do. Any help would be appreciated!
